0e8669ab9159ada1aeb19bbbb250bccce7d60d31
[Mograsim.git] / Input.java
1 package net.mograsim.logic.model.verilog.model.signals;
2
3 public class Input extends IOPort
4 {
5         public Input(String name, int width)
6         {
7                 super(Type.IO_INPUT, name, width);
8         }
9
10         @Override
11         public String toDeclarationVerilogCode()
12         {
13                 return "input [" + (getWidth() - 1) + ":0] " + getName();
14         }
15 }