1 package era.mi.logic.components.gates;
3 import era.mi.logic.types.BitVector.BitVectorMutator;
4 import era.mi.logic.wires.Wire.ReadEnd;
5 import era.mi.logic.wires.Wire.ReadWriteEnd;
8 * Outputs 1 when the number of 1 inputs is odd.
10 * @author Fabian Stemmler
12 public class XorGate extends MultiInputGate
14 public XorGate(int processTime, ReadWriteEnd out, ReadEnd... in)
16 super(processTime, BitVectorMutator::xor, out, in);