26a25cfbe7f8c32c577fa18f8ddd2eef5735573b
[Mograsim.git] / net.mograsim.logic.model.am2900 / components / GUIsel1.json
1 mograsim version: 0.1.3
2 {
3   "width": 35.0,
4   "height": 40.0,
5   "interfacePins": [
6     {
7       "location": {
8         "x": 0.0,
9         "y": 25.0
10       },
11       "name": "I1",
12       "logicWidth": 1
13     },
14     {
15       "location": {
16         "x": 0.0,
17         "y": 35.0
18       },
19       "name": "I2",
20       "logicWidth": 1
21     },
22     {
23       "location": {
24         "x": 35.0,
25         "y": 5.0
26       },
27       "name": "Y",
28       "logicWidth": 1
29     },
30     {
31       "location": {
32         "x": 0.0,
33         "y": 5.0
34       },
35       "name": "S1",
36       "logicWidth": 1
37     },
38     {
39       "location": {
40         "x": 0.0,
41         "y": 15.0
42       },
43       "name": "S2",
44       "logicWidth": 1
45     }
46   ],
47   "submodel": {
48     "innerScale": 0.4,
49     "subComps": [
50       {
51         "id": "GUINandGate",
52         "name": "GUINandGate#1",
53         "pos": {
54           "x": 35.0,
55           "y": 30.0
56         },
57         "params": 1
58       },
59       {
60         "id": "GUINandGate",
61         "name": "GUINandGate#3",
62         "pos": {
63           "x": 60.0,
64           "y": 40.0
65         },
66         "params": 1
67       },
68       {
69         "id": "GUINandGate",
70         "name": "GUINandGate#2",
71         "pos": {
72           "x": 35.0,
73           "y": 55.0
74         },
75         "params": 1
76       }
77     ],
78     "innerWires": [
79       {
80         "pin1": {
81           "compName": "GUINandGate#2",
82           "pinName": "Y"
83         },
84         "pin2": {
85           "compName": "GUINandGate#3",
86           "pinName": "B"
87         },
88         "name": "unnamedWire#9"
89       },
90       {
91         "pin1": {
92           "compName": "GUINandGate#1",
93           "pinName": "Y"
94         },
95         "pin2": {
96           "compName": "GUINandGate#3",
97           "pinName": "A"
98         },
99         "name": "unnamedWire#8"
100       },
101       {
102         "pin1": {
103           "compName": "_submodelinterface",
104           "pinName": "I2"
105         },
106         "pin2": {
107           "compName": "GUINandGate#2",
108           "pinName": "B"
109         },
110         "name": "unnamedWire#7",
111         "path": [
112           {
113             "x": 15.0,
114             "y": 87.5
115           },
116           {
117             "x": 15.0,
118             "y": 70.0
119           }
120         ]
121       },
122       {
123         "pin1": {
124           "compName": "_submodelinterface",
125           "pinName": "S2"
126         },
127         "pin2": {
128           "compName": "GUINandGate#2",
129           "pinName": "A"
130         },
131         "name": "unnamedWire#1",
132         "path": [
133           {
134             "x": 15.0,
135             "y": 37.5
136           },
137           {
138             "x": 15.0,
139             "y": 60.0
140           }
141         ]
142       },
143       {
144         "pin1": {
145           "compName": "_submodelinterface",
146           "pinName": "S1"
147         },
148         "pin2": {
149           "compName": "GUINandGate#1",
150           "pinName": "A"
151         },
152         "name": "unnamedWire#0",
153         "path": [
154           {
155             "x": 25.0,
156             "y": 12.5
157           },
158           {
159             "x": 25.0,
160             "y": 35.0
161           }
162         ]
163       },
164       {
165         "pin1": {
166           "compName": "_submodelinterface",
167           "pinName": "I1"
168         },
169         "pin2": {
170           "compName": "GUINandGate#1",
171           "pinName": "B"
172         },
173         "name": "unnamedWire#5",
174         "path": [
175           {
176             "x": 25.0,
177             "y": 62.5
178           },
179           {
180             "x": 25.0,
181             "y": 45.0
182           }
183         ]
184       },
185       {
186         "pin1": {
187           "compName": "GUINandGate#3",
188           "pinName": "Y"
189         },
190         "pin2": {
191           "compName": "_submodelinterface",
192           "pinName": "Y"
193         },
194         "name": "unnamedWire#10"
195       }
196     ]
197   },
198   "symbolRendererSnippetID": "simpleRectangularLike",
199   "symbolRendererParams": {
200     "centerText": "GUIsel1",
201     "centerTextHeight": 5.0,
202     "horizontalComponentCenter": 17.5,
203     "pinLabelHeight": 3.5,
204     "pinLabelMargin": 0.5
205   },
206   "outlineRendererSnippetID": "default",
207   "highLevelStateHandlerSnippetID": "default"
208 }