X-Git-Url: https://mograsim.net/gitweb/?a=blobdiff_plain;f=era.mi%2Fsrc%2Fera%2Fmi%2Flogic%2Ftests%2FComponentTest.java;h=c566b5625df6ee28b3bb9a697d3e1e9c81379955;hb=2174689b35611c63b60f61c1e076ebb689977a6a;hp=81a2e1f5318c27460e774ae709b66c48b2e37bf0;hpb=fb957af9f642560f3a97bcab0d9d09c233291baa;p=Mograsim.git

diff --git a/era.mi/src/era/mi/logic/tests/ComponentTest.java b/era.mi/src/era/mi/logic/tests/ComponentTest.java
index 81a2e1f5..c566b562 100644
--- a/era.mi/src/era/mi/logic/tests/ComponentTest.java
+++ b/era.mi/src/era/mi/logic/tests/ComponentTest.java
@@ -9,6 +9,7 @@ import org.junit.jupiter.api.Test;
 
 import era.mi.logic.Bit;
 import era.mi.logic.Simulation;
+import era.mi.logic.components.Connector;
 import era.mi.logic.components.Demux;
 import era.mi.logic.components.Merger;
 import era.mi.logic.components.Mux;
@@ -21,6 +22,7 @@ import era.mi.logic.components.gates.XorGate;
 import era.mi.logic.wires.WireArray;
 import era.mi.logic.wires.WireArray.WireArrayEnd;
 
+@SuppressWarnings("unused")
 class ComponentTest
 {
 
@@ -92,6 +94,7 @@ class ComponentTest
 		WireArrayEnd enI = en.createInput(), aI = a.createInput(), bI = b.createInput();
 		enI.feedSignals(Bit.ONE);
 		aI.feedSignals(Bit.ONE);
+		bI.feedSignals(Bit.Z);
 
 		Simulation.TIMELINE.executeAll();
 
@@ -292,7 +295,7 @@ class ComponentTest
 		assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.Z);
 	}
 
-//	@Test
+	@Test
 	void wireConnections()
 	{
 		// Nur ein Experiment, was über mehrere 'passive' Bausteine hinweg passieren würde
@@ -320,7 +323,7 @@ class ComponentTest
 		cI.feedSignals(Bit.Z);
 		test.assertAfterSimulationIs(print, Bit.Z);
 
-		new Connector(b, c);
+		new Connector(b, c).connect();
 		test.assertAfterSimulationIs(print, Bit.Z);
 		System.err.println("ONE");
 		bI.feedSignals(Bit.ONE);
@@ -332,7 +335,7 @@ class ComponentTest
 		bI.feedSignals(Bit.Z);
 		test.assertAfterSimulationIs(print, Bit.Z);
 
-		new Connector(a, b);
+		new Connector(a, b).connect();
 		System.err.println("Z 2");
 		aI.feedSignals(Bit.Z);
 		test.assertAfterSimulationIs(print, Bit.Z);