X-Git-Url: https://mograsim.net/gitweb/?a=blobdiff_plain;f=net.mograsim.logic.core%2Ftest%2Fnet%2Fmograsim%2Flogic%2Fcore%2Ftests%2FComponentTest.java;h=464db587c472595ce90d2e3c107cfc5cd6917c9c;hb=4db274c53e53cda8321067eca57d524f188c2e6f;hp=6055296f8cedbde2e09a61527ca9f6c547d18483;hpb=1c7820abab8dc28939e35275f24a9c25e139add5;p=Mograsim.git diff --git a/net.mograsim.logic.core/test/net/mograsim/logic/core/tests/ComponentTest.java b/net.mograsim.logic.core/test/net/mograsim/logic/core/tests/ComponentTest.java index 6055296f..464db587 100644 --- a/net.mograsim.logic.core/test/net/mograsim/logic/core/tests/ComponentTest.java +++ b/net.mograsim.logic.core/test/net/mograsim/logic/core/tests/ComponentTest.java @@ -4,26 +4,21 @@ import static org.junit.jupiter.api.Assertions.assertArrayEquals; import static org.junit.jupiter.api.Assertions.assertEquals; import static org.junit.jupiter.api.Assertions.fail; -import java.math.BigInteger; -import java.util.Random; -import java.util.function.LongConsumer; - -import org.junit.Before; +import org.junit.jupiter.api.BeforeEach; +import org.junit.jupiter.api.Disabled; import org.junit.jupiter.api.Test; -import net.mograsim.logic.core.components.Connector; import net.mograsim.logic.core.components.Demux; -import net.mograsim.logic.core.components.Merger; import net.mograsim.logic.core.components.Mux; -import net.mograsim.logic.core.components.Splitter; import net.mograsim.logic.core.components.TriStateBuffer; +import net.mograsim.logic.core.components.UnidirectionalMerger; +import net.mograsim.logic.core.components.UnidirectionalSplitter; import net.mograsim.logic.core.components.gates.AndGate; import net.mograsim.logic.core.components.gates.NandGate; import net.mograsim.logic.core.components.gates.NorGate; import net.mograsim.logic.core.components.gates.NotGate; import net.mograsim.logic.core.components.gates.OrGate; import net.mograsim.logic.core.components.gates.XorGate; -import net.mograsim.logic.core.components.memory.WordAddressableMemoryComponent; import net.mograsim.logic.core.timeline.Timeline; import net.mograsim.logic.core.types.Bit; import net.mograsim.logic.core.types.BitVector; @@ -36,7 +31,7 @@ class ComponentTest { private Timeline t = new Timeline(11); - @Before + @BeforeEach void resetTimeline() { t.reset(); @@ -50,9 +45,9 @@ class ComponentTest k = new Wire(t, 1, 1); new AndGate(t, 1, f.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd()); new NotGate(t, 1, f.createReadOnlyEnd(), g.createReadWriteEnd()); - new Merger(t, h.createReadWriteEnd(), c.createReadOnlyEnd(), g.createReadOnlyEnd()); + new UnidirectionalMerger(t, h.createReadWriteEnd(), c.createReadOnlyEnd(), g.createReadOnlyEnd()); new Mux(t, 1, i.createReadWriteEnd(), e.createReadOnlyEnd(), h.createReadOnlyEnd(), d.createReadOnlyEnd()); - new Splitter(t, i.createReadOnlyEnd(), k.createReadWriteEnd(), j.createReadWriteEnd()); + new UnidirectionalSplitter(t, i.createReadOnlyEnd(), k.createReadWriteEnd(), j.createReadWriteEnd()); a.createReadWriteEnd().feedSignals(Bit.ZERO); b.createReadWriteEnd().feedSignals(Bit.ONE); @@ -71,7 +66,7 @@ class ComponentTest { Wire a = new Wire(t, 3, 1), b = new Wire(t, 2, 1), c = new Wire(t, 3, 1), in = new Wire(t, 8, 1); in.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE); - new Splitter(t, in.createReadOnlyEnd(), a.createReadWriteEnd(), b.createReadWriteEnd(), c.createReadWriteEnd()); + new UnidirectionalSplitter(t, in.createReadOnlyEnd(), a.createReadWriteEnd(), b.createReadWriteEnd(), c.createReadWriteEnd()); t.executeAll(); @@ -88,7 +83,7 @@ class ComponentTest b.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO); c.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE); - new Merger(t, out.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd()); + new UnidirectionalMerger(t, out.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd()); t.executeAll(); @@ -99,9 +94,9 @@ class ComponentTest void fusionTest1() { Wire a = new Wire(t, 3, 1), b = new Wire(t, 2, 1), c = new Wire(t, 3, 1), out = new Wire(t, 8, 1); - Wire.fuse(a, out, 0, 0, a.length); - Wire.fuse(b, out, 0, a.length, b.length); - Wire.fuse(c, out, 0, a.length + b.length, c.length); + Wire.fuse(a, out, 0, 0, a.width); + Wire.fuse(b, out, 0, a.width, b.width); + Wire.fuse(c, out, 0, a.width + b.width, c.width); ReadWriteEnd rA = a.createReadWriteEnd(); rA.feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO); ReadWriteEnd rB = b.createReadWriteEnd(); @@ -150,6 +145,18 @@ class ComponentTest assertBitArrayEquals(b.getValues(), Bit.Z, Bit.U, Bit.X); } + @Test + void fusionTest4() + { + Wire a = new Wire(t, 3, 1), b = new Wire(t, 3, 1); + a.createReadWriteEnd(); + t.executeAll(); + + Wire.fuse(a, b); + t.executeAll(); + assertBitArrayEquals(b.getValues(), Bit.U, Bit.U, Bit.U); + } + // @Test // void connectorTest() // { @@ -417,6 +424,8 @@ class ComponentTest fail("Not all events were executed in order!"); } + // TODO: Adapt this test, now that update notifications are issued whenever any input to a wire changes + @Disabled("Out of date") @Test void multipleInputs() { @@ -447,119 +456,6 @@ class ComponentTest assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.Z); } - @Test - void wireConnections() - { - // Nur ein Experiment, was über mehrere 'passive' Bausteine hinweg passieren würde - - Wire a = new Wire(t, 1, 2); - Wire b = new Wire(t, 1, 2); - Wire c = new Wire(t, 1, 2); - ReadWriteEnd aI = a.createReadWriteEnd(); - ReadWriteEnd bI = b.createReadWriteEnd(); - ReadWriteEnd cI = c.createReadWriteEnd(); - - TestBitDisplay test = new TestBitDisplay(t, c.createReadOnlyEnd()); - TestBitDisplay test2 = new TestBitDisplay(t, a.createReadOnlyEnd()); - LongConsumer print = time -> System.out.format("Time %2d\n a: %s\n b: %s\n c: %s\n", time, a, b, c); - - cI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - - cI.feedSignals(Bit.X); - test.assertAfterSimulationIs(print, Bit.X); - - cI.feedSignals(Bit.X); - cI.feedSignals(Bit.Z); - test.assertAfterSimulationIs(print, Bit.Z); - - new Connector(t, b.createReadWriteEnd(), c.createReadWriteEnd()).connect(); - test.assertAfterSimulationIs(print, Bit.Z); - System.err.println("ONE"); - bI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - System.err.println("ZERO"); - bI.feedSignals(Bit.ZERO); - test.assertAfterSimulationIs(print, Bit.ZERO); - System.err.println("Z"); - bI.feedSignals(Bit.Z); - test.assertAfterSimulationIs(print, Bit.Z); - - new Connector(t, a.createReadWriteEnd(), b.createReadWriteEnd()).connect(); - System.err.println("Z 2"); - aI.feedSignals(Bit.Z); - test.assertAfterSimulationIs(print, Bit.Z); - test2.assertAfterSimulationIs(Bit.Z); - System.err.println("ONE 2"); - aI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - test2.assertAfterSimulationIs(Bit.ONE); - System.err.println("ZERO 2"); - aI.feedSignals(Bit.ZERO); - test.assertAfterSimulationIs(print, Bit.ZERO); - test2.assertAfterSimulationIs(Bit.ZERO); - System.err.println("Z 2 II"); - aI.feedSignals(Bit.Z); - test.assertAfterSimulationIs(print, Bit.Z); - test2.assertAfterSimulationIs(Bit.Z); - - System.err.println("No Conflict yet"); - bI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - test2.assertAfterSimulationIs(Bit.ONE); - aI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - test2.assertAfterSimulationIs(Bit.ONE); - System.err.println("Conflict"); - aI.feedSignals(Bit.ZERO); - test.assertAfterSimulationIs(print, Bit.X); - test2.assertAfterSimulationIs(Bit.X); - aI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - test2.assertAfterSimulationIs(Bit.ONE); - } - - @Test - public void wordAddressableMemoryLargeTest() - { - Wire rW = new Wire(t, 1, 2); - Wire data = new Wire(t, 16, 2); - Wire address = new Wire(t, 64, 2); - ReadWriteEnd rWI = rW.createReadWriteEnd(); - ReadWriteEnd dataI = data.createReadWriteEnd(); - ReadWriteEnd addressI = address.createReadWriteEnd(); - - WordAddressableMemoryComponent memory = new WordAddressableMemoryComponent(t, 4, 4096L, Long.MAX_VALUE, data.createReadWriteEnd(), - rW.createReadOnlyEnd(), address.createReadOnlyEnd()); - - Random r = new Random(); - for (long j = 1; j > 0; j *= 2) - { - for (int i = 0; i < 50; i++) - { - String sAddress = String.format("%64s", BigInteger.valueOf(4096 + i + j).toString(2)).replace(' ', '0'); - sAddress = new StringBuilder(sAddress).reverse().toString(); - BitVector bAddress = BitVector.parse(sAddress); - addressI.feedSignals(bAddress); - t.executeAll(); - String random = BigInteger.valueOf(Math.abs(r.nextInt())).toString(5); - random = random.substring(Integer.max(0, random.length() - 16)); - random = String.format("%16s", random).replace(' ', '0'); - random = random.replace('2', 'X').replace('3', 'Z').replace('4', 'U'); - BitVector vector = BitVector.parse(random); - dataI.feedSignals(vector); - rWI.feedSignals(Bit.ZERO); - t.executeAll(); - rWI.feedSignals(Bit.ONE); - t.executeAll(); - dataI.clearSignals(); - t.executeAll(); - - assertBitArrayEquals(dataI.getValues(), vector.getBits()); - } - } - } - private static void assertBitArrayEquals(BitVector actual, Bit... expected) { assertArrayEquals(expected, actual.getBits());