X-Git-Url: https://mograsim.net/gitweb/?a=blobdiff_plain;f=plugins%2Fnet.mograsim.logic.model.verilog%2Fsrc%2Fnet%2Fmograsim%2Flogic%2Fmodel%2Fverilog%2Fmodel%2Fstatements%2FComponentReference.java;h=dcce7606e0f33d102eb54dc152d9f74fd3608507;hb=9d37526a97dbec5434e7a2a0d7fcbf02e91a39a2;hp=f676661acf5a8d5ec22ad703a544b9558d7aed88;hpb=c6087221c312e76ad07cf75da61c735278ab8634;p=Mograsim.git

diff --git a/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/statements/ComponentReference.java b/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/statements/ComponentReference.java
index f676661a..dcce7606 100644
--- a/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/statements/ComponentReference.java
+++ b/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/statements/ComponentReference.java
@@ -6,6 +6,7 @@ import java.util.Set;
 import java.util.stream.Collectors;
 
 import net.mograsim.logic.model.verilog.model.VerilogComponentDeclaration;
+import net.mograsim.logic.model.verilog.model.expressions.Expression;
 import net.mograsim.logic.model.verilog.model.signals.IOPort;
 import net.mograsim.logic.model.verilog.model.signals.Signal;
 
@@ -13,9 +14,9 @@ public class ComponentReference extends Statement
 {
 	private final String name;
 	private final VerilogComponentDeclaration referencedComponent;
-	private final List<Signal> arguments;
+	private final List<Expression> arguments;
 
-	public ComponentReference(String name, VerilogComponentDeclaration referencedComponent, List<Signal> arguments)
+	public ComponentReference(String name, VerilogComponentDeclaration referencedComponent, List<Expression> arguments)
 	{
 		this.name = Objects.requireNonNull(name);
 		this.referencedComponent = Objects.requireNonNull(referencedComponent);
@@ -47,7 +48,7 @@ public class ComponentReference extends Statement
 		return referencedComponent;
 	}
 
-	public List<Signal> getArguments()
+	public List<Expression> getArguments()
 	{
 		return arguments;
 	}
@@ -58,7 +59,7 @@ public class ComponentReference extends Statement
 		StringBuilder sb = new StringBuilder();
 
 		sb.append(referencedComponent.getID() + " " + name);
-		sb.append(arguments.stream().map(Signal::toReferenceVerilogCode).collect(Collectors.joining(", ", "(", ")")));
+		sb.append(arguments.stream().map(Expression::toVerilogCode).collect(Collectors.joining(", ", "(", ")")));
 		sb.append(";");
 
 		return sb.toString();
@@ -79,7 +80,7 @@ public class ComponentReference extends Statement
 	@Override
 	public Set<Signal> getReferencedSignals()
 	{
-		return Set.copyOf(arguments);
+		return arguments.stream().map(Expression::getReferencedSignals).flatMap(Set::stream).collect(Collectors.toUnmodifiableSet());
 	}
 
 	@Override