net.mograsim.logic.model.am2900.components.am2910,
net.mograsim.logic.model.am2900.machine,
net.mograsim.logic.model.am2900.machine.registers,
+ net.mograsim.logic.model.am2900.machine.registers.am2901,
+ net.mograsim.logic.model.am2900.machine.registers.am2904,
+ net.mograsim.logic.model.am2900.machine.registers.am2904.msr,
+ net.mograsim.logic.model.am2900.machine.registers.am2904.musr,
net.mograsim.logic.model.examples
Bundle-RequiredExecutionEnvironment: JavaSE-11
Require-Bundle: org.eclipse.osgi,
"delegateTarget": "dff4_finewe#0",
"subStateID": "q"
}
+ },
+ "q1": {
+ "id": "delegating",
+ "params": {
+ "delegateTarget": "dff4_finewe#0",
+ "subStateID": "q1"
+ }
+ },
+ "q2": {
+ "id": "delegating",
+ "params": {
+ "delegateTarget": "dff4_finewe#0",
+ "subStateID": "q2"
+ }
+ },
+ "q3": {
+ "id": "delegating",
+ "params": {
+ "delegateTarget": "dff4_finewe#0",
+ "subStateID": "q3"
+ }
+ },
+ "q4": {
+ "id": "delegating",
+ "params": {
+ "delegateTarget": "dff4_finewe#0",
+ "subStateID": "q4"
+ }
}
}
},
},
"symbolRendererSnippetID": "simpleRectangularLike",
"symbolRendererParams": {
- "centerText": "ยตSR",
+ "centerText": "\u00b5SR",
"centerTextHeight": 5.0,
"horizontalComponentCenter": 17.5,
"pinLabelHeight": 3.5,
"delegateTarget": "dff4_finewe#0",
"subStateID": "q"
}
+ },
+ "q1": {
+ "id": "delegating",
+ "params": {
+ "delegateTarget": "dff4_finewe#0",
+ "subStateID": "q1"
+ }
+ },
+ "q2": {
+ "id": "delegating",
+ "params": {
+ "delegateTarget": "dff4_finewe#0",
+ "subStateID": "q2"
+ }
+ },
+ "q3": {
+ "id": "delegating",
+ "params": {
+ "delegateTarget": "dff4_finewe#0",
+ "subStateID": "q3"
+ }
+ },
+ "q4": {
+ "id": "delegating",
+ "params": {
+ "delegateTarget": "dff4_finewe#0",
+ "subStateID": "q4"
+ }
}
}
},
@Override
public Object recalculate(Object lastState, Map<String, ReadEnd> readEnds, Map<String, ReadWriteEnd> readWriteEnds)
{
- Bit[] QC = (Bit[]) lastState;
- if (QC == null)
- QC = new Bit[] { U, U, U, U, U };
+ Bit[] QC = castAndInitState(lastState);
Bit CVal = readEnds.get("C").getValue();
@Override
protected Object getHighLevelState(Object state, String stateID)
{
- switch (stateID)
+ Bit[] QC = castAndInitState(state);
+
+ if ("q".equals(stateID))
+ return BitVector.of(Arrays.copyOfRange(QC, 1, 5));
+ if (stateID.length() == 2 && stateID.charAt(0) == 'q')
{
- case "q":
- return state == null ? BitVector.of(U, U, U, U) : BitVector.of(Arrays.copyOfRange((Bit[]) state, 1, 5));
- default:
- return super.getHighLevelState(state, stateID);
+ char secondChar = stateID.charAt(1);
+ if (secondChar >= '1' && secondChar <= '4')
+ return BitVector.of(QC[secondChar - '0']);
}
+ return super.getHighLevelState(state, stateID);
}
@Override
protected Object setHighLevelState(Object lastState, String stateID, Object newHighLevelState)
{
- switch (stateID)
+ Bit[] QC = castAndInitState(lastState);
+
+ if ("q".equals(stateID))
{
- case "q":
BitVector newHighLevelStateCasted = (BitVector) newHighLevelState;
if (newHighLevelStateCasted.length() != 4)
throw new IllegalArgumentException("Expected BitVector of length 4, not " + newHighLevelStateCasted.length());
- System.arraycopy(newHighLevelStateCasted.getBits(), 0, lastState, 1, 4);
- return lastState;
- default:
- return super.setHighLevelState(lastState, stateID, newHighLevelState);
+ System.arraycopy(newHighLevelStateCasted.getBits(), 0, QC, 1, 4);
+ return QC;
+ }
+ if (stateID.length() == 2 && stateID.charAt(0) == 'q')
+ {
+ char secondChar = stateID.charAt(1);
+ if (secondChar >= '1' && secondChar <= '4')
+ {
+ Bit newHighLevelStateCasted;
+ if (newHighLevelState instanceof Bit)
+ newHighLevelStateCasted = (Bit) newHighLevelState;
+ else
+ {
+ BitVector vector = (BitVector) newHighLevelState;
+ if (vector.length() != 1)
+ throw new IllegalArgumentException("Expected BitVector of length 1, not " + vector.length());
+ newHighLevelStateCasted = vector.getMSBit(0);
+ }
+ QC[secondChar - '0'] = newHighLevelStateCasted;
+ return QC;
+ }
}
+ return super.setHighLevelState(QC, stateID, newHighLevelState);
+ }
+
+ private static Bit[] castAndInitState(Object state)
+ {
+ Bit[] QC = (Bit[]) state;
+ if (QC == null)
+ QC = new Bit[] { U, U, U, U, U };
+ return QC;
}
static
package net.mograsim.logic.model.am2900.machine;
+import java.util.ArrayList;
import java.util.Collections;
-import java.util.HashSet;
-import java.util.Set;
+import java.util.List;
-import net.mograsim.logic.model.am2900.machine.registers.NumberedRegister;
-import net.mograsim.logic.model.am2900.machine.registers.QRegister;
+import net.mograsim.logic.model.am2900.machine.registers.am2901.Am2901RegisterGroup;
+import net.mograsim.logic.model.am2900.machine.registers.am2904.Am2904RegisterGroup;
import net.mograsim.logic.model.model.LogicModelModifiable;
import net.mograsim.machine.ISASchema;
import net.mograsim.machine.MachineDefinition;
-import net.mograsim.machine.Register;
-import net.mograsim.machine.RegisterGroup;
+import net.mograsim.machine.registers.Register;
+import net.mograsim.machine.registers.RegisterGroup;
//we can't use the Singleton pattern here because a MachineDefinition needs a public parameterless constructor
//(used for detecting installed machines in plugin.core)
public static final String SIMPLE_AM2900_MACHINE_ID = "Am2900Simple";
public static final String STRICT_AM2900_MACHINE_ID = "Am2900Strict";
- public static final Set<Register> allRegisters;
+ public static final List<Register> unsortedRegisters;
+ public static final List<RegisterGroup> registerGroups;
static
{
- Set<Register> allRegistersModifiable = new HashSet<>();
- allRegistersModifiable.add(QRegister.instance);
- allRegistersModifiable.addAll(NumberedRegister.instancesCorrectOrder);
- // TODO MSR, muSR, MIR, IR, PC/BZ...
- allRegisters = Collections.unmodifiableSet(allRegistersModifiable);
+ List<Register> unsortedRegistersModifiable = new ArrayList<>();
+ // TODO MIR, IR, PC/BZ...
+ unsortedRegisters = Collections.unmodifiableList(unsortedRegistersModifiable);
+ List<RegisterGroup> registerGroupsModifiable = new ArrayList<>();
+ registerGroupsModifiable.add(Am2901RegisterGroup.instance);
+ registerGroupsModifiable.add(Am2904RegisterGroup.instance);
+ // TODO Am2910
+ registerGroups = Collections.unmodifiableList(registerGroupsModifiable);
}
public final boolean strict;
}
@Override
- public Set<Register> getRegisters()
+ public List<Register> getUnsortedRegisters()
{
- return allRegisters;
+ return unsortedRegisters;
+ }
+
+ @Override
+ public List<RegisterGroup> getRegisterGroups()
+ {
+ return registerGroups;
}
@Override
return Am2900MicroInstructionMemoryDefinition.instance;
}
- @Override
- public Set<RegisterGroup> getRegisterGroups()
- {
- return null; // TODO create groups for am2904, am2901-asmUsable, am2901-internal, ...
- }
-
}
package net.mograsim.logic.model.am2900.machine;
-import java.util.HashMap;
import java.util.HashSet;
-import java.util.Map;
+import java.util.List;
import java.util.Set;
import java.util.function.Consumer;
import net.mograsim.logic.core.timeline.Timeline;
import net.mograsim.logic.core.types.Bit;
import net.mograsim.logic.core.types.BitVector;
-import net.mograsim.logic.model.am2900.machine.registers.NumberedRegister;
-import net.mograsim.logic.model.am2900.machine.registers.QRegister;
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
import net.mograsim.logic.model.model.LogicModel;
import net.mograsim.logic.model.model.LogicModelModifiable;
import net.mograsim.logic.model.model.components.ModelComponent;
import net.mograsim.logic.model.serializing.IndirectModelComponentCreator;
import net.mograsim.machine.Machine;
import net.mograsim.machine.MachineDefinition;
-import net.mograsim.machine.Register;
import net.mograsim.machine.mi.AssignableMicroInstructionMemory;
import net.mograsim.machine.mi.MicroInstruction;
import net.mograsim.machine.mi.MicroInstructionDefinition;
import net.mograsim.machine.mi.StandardMicroInstructionMemory;
import net.mograsim.machine.mi.parameters.MicroInstructionParameter;
import net.mograsim.machine.mi.parameters.ParameterClassification;
+import net.mograsim.machine.registers.Register;
+import net.mograsim.machine.registers.RegisterGroup;
import net.mograsim.machine.standard.memory.AssignableMainMemory;
import net.mograsim.machine.standard.memory.WordAddressableMemory;
private long activeInstructionAddress;
private final Set<ActiveMicroInstructionChangedListener> amicListeners;
- private final Map<Register, Map<Consumer<BitVector>, Consumer<Object>>> modelListenersPerRegisterListenerPerRegister;
public Am2900Machine(LogicModelModifiable model, AbstractAm2900MachineDefinition am2900MachineDefinition)
{
this.am2900 = IndirectModelComponentCreator.createComponent(logicModel,
"resloader:Am2900Loader:jsonres:net/mograsim/logic/model/am2900/components/Am2900.json", "Am2900");
this.amicListeners = new HashSet<>();
- this.modelListenersPerRegisterListenerPerRegister = new HashMap<>();
CoreModelParameters params = new CoreModelParameters();
params.gateProcessTime = 50;
am2900.setHighLevelState("muir_2.q", jzMI.toBitVector());
if (!machineDefinition.strict)
{
- for (Register r : machineDefinition.getRegisters())
- setRegister(r, BitVector.of(Bit.ZERO, r.getWidth()));
+ setRegistersToZero(machineDefinition.getUnsortedRegisters());
+ setRegisterGroupToZero(machineDefinition.getRegisterGroups());
// TODO reset latches?
}
}
+ private void setRegistersToZero(List<Register> registers)
+ {
+ for (Register r : registers)
+ setRegister(r, BitVector.of(Bit.ZERO, r.getWidth()));
+ }
+
+ private void setRegisterGroupToZero(List<RegisterGroup> registerGroups)
+ {
+ for (RegisterGroup rg : registerGroups)
+ {
+ setRegistersToZero(rg.getRegisters());
+ setRegisterGroupToZero(rg.getSubGroups());
+ }
+ }
+
@Override
public LogicModel getModel()
{
return clock;
}
- // TODO too much code duplication
-
@Override
public BitVector getRegister(Register r)
{
- String am2901CellSuffix = getAm2901CellSuffix(r);
- BitVector result = BitVector.of();
- for (int i = 0; i < 16; i += 4)
- {
- String hlsID = String.format("am2901_%d-%d.%s", (i + 3), i, am2901CellSuffix);
- result = result.concat((BitVector) am2900.getHighLevelState(hlsID));
- }
- return result;
+ return castAm2900Register(r).read(am2900);
}
@Override
public void setRegister(Register r, BitVector value)
{
- String am2901CellSuffix = getAm2901CellSuffix(r);
- for (int i = 0; i < 16; i += 4)
- {
- String hlsID = String.format("am2901_%d-%d.%s", (i + 3), i, am2901CellSuffix);
- am2900.setHighLevelState(hlsID, value.subVector(i, i + 4));
- }
+ castAm2900Register(r).write(am2900, value);
}
@Override
public void addRegisterListener(Register r, Consumer<BitVector> listener)
{
- Map<Consumer<BitVector>, Consumer<Object>> modelListenersPerRegisterListener = modelListenersPerRegisterListenerPerRegister
- .computeIfAbsent(r, k -> new HashMap<>());
- if (modelListenersPerRegisterListener.containsKey(listener))
- return;
-
- Consumer<Object> modelListener = v -> listener.accept(getRegister(r));
- String am2901CellSuffix = getAm2901CellSuffix(r);
- for (int i = 0; i < 16; i += 4)
- {
- String hlsID = String.format("am2901_%d-%d.%s", (i + 3), i, am2901CellSuffix);
- am2900.addHighLevelStateListener(hlsID, modelListener);
- }
+ castAm2900Register(r).addListener(am2900, listener);
}
@Override
public void removeRegisterListener(Register r, Consumer<BitVector> listener)
{
- Map<Consumer<BitVector>, Consumer<Object>> modelListenersPerRegisterListener = modelListenersPerRegisterListenerPerRegister.get(r);
- if (modelListenersPerRegisterListener == null)
- return;
-
- Consumer<Object> modelListener = modelListenersPerRegisterListener.get(listener);
- if (modelListener == null)
- return;
-
- String am2901CellSuffix = getAm2901CellSuffix(r);
- for (int i = 0; i < 16; i += 4)
- {
- String hlsID = String.format("am2901_%d-%d.%s", (i + 3), i, am2901CellSuffix);
- am2900.removeHighLevelStateListener(hlsID, modelListener);
- }
+ castAm2900Register(r).removeListener(am2900, listener);
}
- private static String getAm2901CellSuffix(Register r)
+ private static Am2900Register castAm2900Register(Register r)
{
- if (r instanceof QRegister)
- return "qreg.q";
- if (r instanceof NumberedRegister)
- return "regs.c" + ((NumberedRegister) r).getIndexAsBitstring() + ".q";
+ if (r instanceof Am2900Register)
+ return (Am2900Register) r;
throw new IllegalArgumentException("Not a register of an Am2900Machine: " + r);
}
// 0b10_0101, 0b10_0100, 0b10_1101, 0b10_1100, 0b10_1110, 0b10_1111, 0b10_0010, 0b10_0011, 0b10_0000, 0b10_0001 },
// 6);
// TODO: Maybe "X" and "notX" are swapped.
- private static final MnemonicFamily am2904StatusInstructions = new MnemonicFamilyBuilder(6).addX().setXDefault()
- .add("LoadM_LoadY_ยต_NxorOVRorZ", "Set_Set_ยต_NxnorOVRornotZ", "Swap_Swap_ยต_NxorOVR", "Reset_Reset_ยต_NxnorOVR",
- "Load_LoadForShiftThroughOvr_ยต_Z", "Load_Invert_ยต_notZ", "LoadOvrRetain_Load_ยต_OVR", "LoadOvrRetain_Load_ยต_notOVR",
- "ResetZ_LoadCarryInvert_ยต_CorZ", "SetZ_LoadCarryInvert_ยต_notCandnotZ", "ResetC_Load_ยต_C", "SetC_Load_ยต_notC",
- "ResetN_Load_ยต_notCorZ", "SetN_Load_ยต_CandnotZ", "ResetOvr_Load_IM_NxorN", "SetOvr_Load_IM_NxnorN",
- "Load_Load_ยต_NxorOVRorZ", "Load_Load_ยต_NxnorOVRornotZ", "Load_Load_ยต_NxorOVR", "Load_Load_ยต_NxnorOVR", "Load_Load_ยต_Z",
- "Load_Load_ยต_notZ", "Load_Load_ยต_OVR", "Load_Load_ยต_notOVR", "LoadCarryInvert_LoadCarryInvert_ยต_CorZ",
- "LoadCarryInvert_LoadCarryInvert_ยต_notCandnotZ", "Load_Load_ยต_C", "Load_Load_ยต_notC", "Load_Load_ยต_notCorZ",
- "Load_Load_ยต_CandnotZ", "Load_Load_ยต_N", "Load_Load_ยต_notN", "Load_Load_M_NxorOVRorZ", "Load_Load_M_NxnorOVRornotZ",
- "Load_Load_M_NxorOVR", "Load_Load_M_NxnorOVR", "Load_Load_M_Z", "Load_Load_M_notZ", "Load_Load_M_OVR",
- "Load_Load_M_notOVR", "LoadCarryInvert_LoadCarryInvert_M_CorZ", "LoadCarryInvert_LoadCarryInvert_M_notCandnotZ",
- "Load_Load_M_C", "Load_Load_M_notC", "Load_Load_M_notCorZ", "Load_Load_M_CandnotZ", "Load_Load_M_N", "Load_Load_M_notN",
- "Load_Load_I_NxorOVRorZ", "Load_Load_I_NxnorOVRornotZ", "Load_Load_I_NxorOVR", "Load_Load_I_NxnorOVR", "Load_Load_I_Z",
- "Load_Load_I_notZ", "Load_Load_I_OVR", "Load_Load_I_notOVR", "LoadCarryInvert_LoadCarryInvert_I_notCorZ",
- "LoadCarryInvert_LoadCarryInvert_I_CandnotZ", "Load_Load_I_C", "Load_Load_I_notC", "Load_Load_I_notCorZ",
- "Load_Load_I_CandnotZ", "Load_Load_I_N", "Load_Load_I_notN")
- .build();
+ private static final MnemonicFamily am2904StatusInstructions = new MnemonicFamilyBuilder(6).addX().setXDefault().add(
+ "LoadM_LoadY_\u00b5_NxorOVRorZ", "Set_Set_\u00b5_NxnorOVRornotZ", "Swap_Swap_\u00b5_NxorOVR", "Reset_Reset_\u00b5_NxnorOVR",
+ "Load_LoadForShiftThroughOvr_\u00b5_Z", "Load_Invert_\u00b5_notZ", "LoadOvrRetain_Load_\u00b5_OVR",
+ "LoadOvrRetain_Load_\u00b5_notOVR", "ResetZ_LoadCarryInvert_\u00b5_CorZ", "SetZ_LoadCarryInvert_\u00b5_notCandnotZ",
+ "ResetC_Load_\u00b5_C", "SetC_Load_\u00b5_notC", "ResetN_Load_\u00b5_notCorZ", "SetN_Load_\u00b5_CandnotZ",
+ "ResetOvr_Load_IM_NxorN", "SetOvr_Load_IM_NxnorN", "Load_Load_\u00b5_NxorOVRorZ", "Load_Load_\u00b5_NxnorOVRornotZ",
+ "Load_Load_\u00b5_NxorOVR", "Load_Load_\u00b5_NxnorOVR", "Load_Load_\u00b5_Z", "Load_Load_\u00b5_notZ", "Load_Load_\u00b5_OVR",
+ "Load_Load_\u00b5_notOVR", "LoadCarryInvert_LoadCarryInvert_\u00b5_CorZ", "LoadCarryInvert_LoadCarryInvert_\u00b5_notCandnotZ",
+ "Load_Load_\u00b5_C", "Load_Load_\u00b5_notC", "Load_Load_\u00b5_notCorZ", "Load_Load_\u00b5_CandnotZ", "Load_Load_\u00b5_N",
+ "Load_Load_\u00b5_notN", "Load_Load_M_NxorOVRorZ", "Load_Load_M_NxnorOVRornotZ", "Load_Load_M_NxorOVR", "Load_Load_M_NxnorOVR",
+ "Load_Load_M_Z", "Load_Load_M_notZ", "Load_Load_M_OVR", "Load_Load_M_notOVR", "LoadCarryInvert_LoadCarryInvert_M_CorZ",
+ "LoadCarryInvert_LoadCarryInvert_M_notCandnotZ", "Load_Load_M_C", "Load_Load_M_notC", "Load_Load_M_notCorZ",
+ "Load_Load_M_CandnotZ", "Load_Load_M_N", "Load_Load_M_notN", "Load_Load_I_NxorOVRorZ", "Load_Load_I_NxnorOVRornotZ",
+ "Load_Load_I_NxorOVR", "Load_Load_I_NxnorOVR", "Load_Load_I_Z", "Load_Load_I_notZ", "Load_Load_I_OVR", "Load_Load_I_notOVR",
+ "LoadCarryInvert_LoadCarryInvert_I_notCorZ", "LoadCarryInvert_LoadCarryInvert_I_CandnotZ", "Load_Load_I_C", "Load_Load_I_notC",
+ "Load_Load_I_notCorZ", "Load_Load_I_CandnotZ", "Load_Load_I_N", "Load_Load_I_notN").build();
+ // 00b5 = micro symbol
private static final BooleanClassification ccen = new BooleanClassification(true, "PS", "C");
private static final MnemonicFamily am2910Instructions = new MnemonicFamilyBuilder(4).addX()
.add("JZ", "CJS", "JMAP", "CJP", "PUSH", "JSRP", "CJV", "JRP", "RFCT", "RPCT", "CRTN", "CJPP", "LDCT", "LOOP", "CONT", "TWB")
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers;
+
+import net.mograsim.machine.registers.ModelComponentBasedRegister;
+
+public interface Am2900Register extends ModelComponentBasedRegister
+{
+ // marker interface
+}
\ No newline at end of file
+++ /dev/null
-package net.mograsim.logic.model.am2900.machine.registers;
-
-import java.util.ArrayList;
-import java.util.Arrays;
-import java.util.Collections;
-import java.util.HashMap;
-import java.util.HashSet;
-import java.util.List;
-
-import net.mograsim.machine.StandardRegister;
-
-public class NumberedRegister extends StandardRegister
-{
- public static final List<NumberedRegister> instancesCorrectOrder;
-
- static
- {
- List<NumberedRegister> instancesCorrectOrderModifiable = new ArrayList<>();
- for (int i = 0; i < 16; i++)
- instancesCorrectOrderModifiable.add(new NumberedRegister(i));
- instancesCorrectOrder = Collections.unmodifiableList(instancesCorrectOrderModifiable);
- }
-
- private final int index;
- private final String indexBitstring;
-
- private NumberedRegister(int i)
- {
- super("R" + i, new HashSet<>(Arrays.asList(new String[] { "R" + i, "Register #" + i, "Register " + i })), 16, new HashMap<>());
- this.index = i;
-
- StringBuilder sb = new StringBuilder();
- sb.append((index & 0b1000) != 0 ? '1' : '0');
- sb.append((index & 0b0100) != 0 ? '1' : '0');
- sb.append((index & 0b0010) != 0 ? '1' : '0');
- sb.append((index & 0b0001) != 0 ? '1' : '0');
- this.indexBitstring = sb.toString();
- }
-
- public int getIndex()
- {
- return index;
- }
-
- public String getIndexAsBitstring()
- {
- return indexBitstring;
- }
-}
\ No newline at end of file
+++ /dev/null
-package net.mograsim.logic.model.am2900.machine.registers;
-
-import java.util.Arrays;
-import java.util.HashMap;
-import java.util.HashSet;
-
-import net.mograsim.machine.StandardRegister;
-
-public class QRegister extends StandardRegister
-{
- public static final QRegister instance = new QRegister();
-
- private QRegister()
- {
- super("qreg", new HashSet<>(Arrays.asList(new String[] { "qreg", "Q register" })), 16, new HashMap<>());
- }
-}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2901;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class Am2901Register extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public Am2901Register(String id, String cellSuffix, int logicWidthPerAm2901)
+ {
+ super(id, new int[] { logicWidthPerAm2901, logicWidthPerAm2901, logicWidthPerAm2901, logicWidthPerAm2901 },
+ prefixWithAm2901s(cellSuffix));
+ }
+
+ private static String[] prefixWithAm2901s(String suffix)
+ {
+ String[] prefixed = new String[4];
+ for (int i = 0, b = 0; i < 4; i++, b += 4)
+ prefixed[i] = String.format("am2901_%d-%d.%s", (b + 3), b, suffix);
+ return prefixed;
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2901;
+
+import java.util.ArrayList;
+import java.util.List;
+
+import net.mograsim.machine.registers.Register;
+import net.mograsim.machine.registers.SimpleRegisterGroup;
+
+public class Am2901RegisterGroup extends SimpleRegisterGroup
+{
+ public static final Am2901RegisterGroup instance = new Am2901RegisterGroup();
+
+ private Am2901RegisterGroup()
+ {
+ super("Am2901", getAllRegisters());
+ }
+
+ private static Register[] getAllRegisters()
+ {
+ List<Register> allRegistersModifiable = new ArrayList<>();
+ allRegistersModifiable.addAll(NumberedRegister.instancesCorrectOrder);
+ allRegistersModifiable.add(QRegister.instance);
+ return allRegistersModifiable.toArray(Register[]::new);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2901;
+
+import java.util.ArrayList;
+import java.util.Collections;
+import java.util.List;
+
+public class NumberedRegister extends Am2901Register
+{
+ public static final List<NumberedRegister> instancesCorrectOrder;
+
+ static
+ {
+ List<NumberedRegister> instancesCorrectOrderModifiable = new ArrayList<>();
+ for (int i = 0; i < 16; i++)
+ instancesCorrectOrderModifiable.add(new NumberedRegister(i));
+ instancesCorrectOrder = Collections.unmodifiableList(instancesCorrectOrderModifiable);
+ }
+
+ private NumberedRegister(int index)
+ {
+ super("R" + index, "regs.c" + getIndexAsBitstring(index) + ".q", 4);
+
+ }
+
+ private static String getIndexAsBitstring(int index)
+ {
+ StringBuilder sb = new StringBuilder();
+ sb.append((index & 0b1000) != 0 ? '1' : '0');
+ sb.append((index & 0b0100) != 0 ? '1' : '0');
+ sb.append((index & 0b0010) != 0 ? '1' : '0');
+ sb.append((index & 0b0001) != 0 ? '1' : '0');
+ return sb.toString();
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2901;
+
+public class QRegister extends Am2901Register
+{
+ public static final QRegister instance = new QRegister();
+
+ private QRegister()
+ {
+ super("Q", "qreg.q", 4);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904;
+
+import net.mograsim.logic.model.am2900.machine.registers.am2904.msr.MSRRegisterGroup;
+import net.mograsim.logic.model.am2900.machine.registers.am2904.musr.muSRRegisterGroup;
+import net.mograsim.machine.registers.SimpleRegisterGroup;
+
+public class Am2904RegisterGroup extends SimpleRegisterGroup
+{
+ public static final Am2904RegisterGroup instance = new Am2904RegisterGroup();
+
+ private Am2904RegisterGroup()
+ {
+ super("Am2904", MSRRegisterGroup.instance, muSRRegisterGroup.instance);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.msr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class MCRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final MCRegister instance = new MCRegister();
+
+ private MCRegister()
+ {
+ super("C", "am2904.msr.q2", 1);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.msr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class MNRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final MNRegister instance = new MNRegister();
+
+ private MNRegister()
+ {
+ super("N", "am2904.msr.q3", 1);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.msr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class MOVRRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final MOVRRegister instance = new MOVRRegister();
+
+ private MOVRRegister()
+ {
+ super("OVR", "am2904.msr.q4", 1);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.msr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class MSRRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final MSRRegister instance = new MSRRegister();
+
+ private MSRRegister()
+ {
+ super("MSR", "am2904.msr.q", 4);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.msr;
+
+import net.mograsim.machine.registers.SimpleRegisterGroup;
+
+public class MSRRegisterGroup extends SimpleRegisterGroup
+{
+ public static final MSRRegisterGroup instance = new MSRRegisterGroup();
+
+ private MSRRegisterGroup()
+ {
+ super("MSR", MSRRegister.instance, MZRegister.instance, MCRegister.instance, MNRegister.instance, MOVRRegister.instance);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.msr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class MZRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final MZRegister instance = new MZRegister();
+
+ private MZRegister()
+ {
+ super("Z", "am2904.msr.q1", 1);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.musr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class muCRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final muCRegister instance = new muCRegister();
+
+ private muCRegister()
+ {
+ super("C", "am2904.musr.q2", 1);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.musr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class muNRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final muNRegister instance = new muNRegister();
+
+ private muNRegister()
+ {
+ super("N", "am2904.musr.q3", 1);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.musr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class muOVRRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final muOVRRegister instance = new muOVRRegister();
+
+ private muOVRRegister()
+ {
+ super("OVR", "am2904.musr.q4", 1);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.musr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class muSRRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final muSRRegister instance = new muSRRegister();
+
+ private muSRRegister()
+ {
+ super("\u00b5SR", "am2904.musr.q", 4); // 00b5 = micro symbol
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.musr;
+
+import net.mograsim.machine.registers.SimpleRegisterGroup;
+
+public class muSRRegisterGroup extends SimpleRegisterGroup
+{
+ public static final muSRRegisterGroup instance = new muSRRegisterGroup();
+
+ private muSRRegisterGroup()
+ {
+ super("\u00b5SR", muSRRegister.instance, muZRegister.instance, muCRegister.instance, muNRegister.instance, muOVRRegister.instance);
+ // 00b5 = micro symbol
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.logic.model.am2900.machine.registers.am2904.musr;
+
+import net.mograsim.logic.model.am2900.machine.registers.Am2900Register;
+import net.mograsim.machine.registers.HighLevelStateBasedRegister;
+
+public class muZRegister extends HighLevelStateBasedRegister implements Am2900Register
+{
+ public static final muZRegister instance = new muZRegister();
+
+ private muZRegister()
+ {
+ super("Z", "am2904.musr.q1", 1);
+ }
+}
\ No newline at end of file
net.mograsim.machine.mi,
net.mograsim.machine.mi.components,
net.mograsim.machine.mi.parameters,
+ net.mograsim.machine.registers,
net.mograsim.machine.standard.memory
Bundle-Activator: net.mograsim.machine.MachineLoader
Bundle-ActivationPolicy: lazy
import net.mograsim.logic.core.types.BitVector;
import net.mograsim.logic.model.model.LogicModel;
import net.mograsim.machine.mi.AssignableMicroInstructionMemory;
+import net.mograsim.machine.registers.Register;
import net.mograsim.machine.standard.memory.AssignableMainMemory;
public interface Machine
package net.mograsim.machine;
-import java.util.Set;
+import java.util.List;
import net.mograsim.machine.mi.MicroInstructionMemoryDefinition;
+import net.mograsim.machine.registers.Register;
+import net.mograsim.machine.registers.RegisterGroup;
public interface MachineDefinition
{
ISASchema getISASchema();
/**
- * Returns a set of all {@link Register}s present in the machine.
+ * Returns a set of all {@link Register}s present in the machine that are not part of a register group.
*
* @return all registers present in the machine.
* @author Christian Femers
*/
- Set<Register> getRegisters();
+ List<Register> getUnsortedRegisters();
/**
* Returns a set of all RegisterGroups that the machine contains
* @return all register groups present in the machine.
* @author Christian Femers
*/
- Set<RegisterGroup> getRegisterGroups();
+ List<RegisterGroup> getRegisterGroups();
/**
* The number of bits used by the machine to address main memory. Note that this should be the number of bits used in the CPU, not a
+++ /dev/null
-package net.mograsim.machine;
-
-import java.util.Set;
-
-/**
- * A register in a machine is defined by this interface. A hardware register may have {@link Register#names() named sub-registers}.
- *
- *
- * @author Christian Femers
- *
- */
-public interface Register extends Identifiable
-{
- /**
- * The unique identifier of the register. This does not have to be the display name or name in the assembly language.
- *
- * @return the registers id as case sensitive String
- * @author Christian Femers
- */
- @Override
- String id();
-
- /**
- * The name(s) of this register. This is the displayed name and the name used in the assembly language. All names of all registers must
- * be case-insensitive unique. A register can have multiple names if these names address different regions (but still have a common
- * hardware structure), e.g. <code>EAX</code>, <code>AX</code>, <code>AL</code>, <code>AH</code>.
- *
- * @return all the names of regions addressing this register, must be case-insensitive.
- * @author Christian Femers
- */
- Set<String> names();
-
- /**
- * Returns the complete width in bits of the underlying hardware structure the register and possible sub-registers are part of.
- *
- * @param name the name of the register
- * @return the width of the (sub-)register in bits.
- *
- * @see #names()
- * @author Christian Femers
- */
- int getWidth();
-
- /**
- * Returns the width in bits of the register or a named part of it.
- *
- * @param name the name of the register
- * @return the width of the (sub-)register in bits.
- *
- * @see #names()
- * @author Christian Femers
- */
- int getWidth(String name);
-}
+++ /dev/null
-package net.mograsim.machine;
-
-import java.util.Set;
-
-public interface RegisterGroup extends Identifiable
-{
- /**
- * Returns all Registers contained in this group and subgroups
- */
- Set<Register> getRegisters();
-
- /**
- * Returns the sub groups of this group. May very well be an empty set.
- */
- Set<RegisterGroup> getSubGroups();
-}
+++ /dev/null
-package net.mograsim.machine;
-
-import java.util.Collections;
-import java.util.HashSet;
-import java.util.List;
-import java.util.Set;
-
-public class SimpleRegisterGroup implements RegisterGroup
-{
-
- private final String id;
- private final Set<Register> registers;
-
- protected SimpleRegisterGroup(String id, Register... registers)
- {
- this.id = id;
- this.registers = Collections.unmodifiableSet(new HashSet<>(List.of(registers)));
- }
-
- @Override
- public String id()
- {
- return id;
- }
-
- @Override
- public Set<Register> getRegisters()
- {
- return registers;
- }
-
- @Override
- public Set<RegisterGroup> getSubGroups()
- {
- return Set.of();
- }
-
-}
+++ /dev/null
-package net.mograsim.machine;
-
-import java.util.Collections;
-import java.util.HashMap;
-import java.util.HashSet;
-import java.util.Map;
-import java.util.Set;
-
-public abstract class StandardRegister implements Register
-{
- private final String id;
- private final Set<String> names;
- private final int width;
- private final Map<String, Integer> widthForAliases;
-
- public StandardRegister(String id, Set<String> names, int width, Map<String, Integer> widthForAliases)
- {
- this.id = id;
- this.names = Collections.unmodifiableSet(new HashSet<>(names));
- this.width = width;
- this.widthForAliases = Collections.unmodifiableMap(new HashMap<>(widthForAliases));
- }
-
- @Override
- public String id()
- {
- return id;
- }
-
- @Override
- public Set<String> names()
- {
- return names;
- }
-
- @Override
- public int getWidth()
- {
- return width;
- }
-
- @Override
- public int getWidth(String name)
- {
- return widthForAliases.getOrDefault(name, width);
- }
-}
\ No newline at end of file
+++ /dev/null
-package net.mograsim.machine;
-
-import java.util.Collections;
-import java.util.HashSet;
-import java.util.List;
-import java.util.Set;
-import java.util.stream.Collectors;
-
-public class UnionRegisterGroup implements RegisterGroup
-{
- private final String id;
- private final Set<RegisterGroup> subGroups;
- private final Set<Register> subGroupRegisters;
-
- public UnionRegisterGroup(String id, RegisterGroup... subGroups)
- {
- this.id = id;
- this.subGroups = Collections.unmodifiableSet(new HashSet<>(List.of(subGroups)));
- this.subGroupRegisters = this.subGroups.stream().flatMap(sg -> sg.getRegisters().stream()).distinct()
- .collect(Collectors.toUnmodifiableSet());
- }
-
- @Override
- public String id()
- {
- return id;
- }
-
- @Override
- public Set<Register> getRegisters()
- {
- return subGroupRegisters;
- }
-
- @Override
- public Set<RegisterGroup> getSubGroups()
- {
- return subGroups;
- }
-
-}
--- /dev/null
+package net.mograsim.machine.registers;
+
+import java.util.Arrays;
+import java.util.HashMap;
+import java.util.Map;
+import java.util.function.Consumer;
+
+import net.mograsim.logic.core.types.BitVector;
+import net.mograsim.logic.model.model.components.ModelComponent;
+
+public class HighLevelStateBasedRegister extends SimpleRegister implements ModelComponentBasedRegister
+{
+ private final String[] hlsIDsToConcat;
+ private final int[] hlsWidthes;
+
+ private final Map<Consumer<BitVector>, Consumer<Object>> modelListenersPerRegisterListener;
+
+ public HighLevelStateBasedRegister(String id, String hlsID, int logicWidth)
+ {
+ this(id, new int[] { logicWidth }, hlsID);
+ }
+
+ public HighLevelStateBasedRegister(String id, int[] hlsWidthes, String... hlsIDsToConcat)
+ {
+ super(id, Arrays.stream(hlsWidthes).sum());
+ if (hlsIDsToConcat.length != hlsWidthes.length)
+ throw new IllegalArgumentException();
+ this.hlsIDsToConcat = Arrays.copyOf(hlsIDsToConcat, hlsIDsToConcat.length);
+ this.hlsWidthes = Arrays.copyOf(hlsWidthes, hlsIDsToConcat.length);
+
+ this.modelListenersPerRegisterListener = new HashMap<>();
+ }
+
+ @Override
+ public BitVector read(ModelComponent component)
+ {
+ BitVector result = BitVector.of();
+ for (int i = 0; i < hlsIDsToConcat.length; i++)
+ {
+ BitVector hls = (BitVector) component.getHighLevelState(hlsIDsToConcat[i]);
+ if (hls.length() != hlsWidthes[i])
+ throw new IllegalArgumentException();
+ result = result.concat(hls);
+ }
+ return result;
+ }
+
+ @Override
+ public void write(ModelComponent component, BitVector value)
+ {
+ if (value.length() != getWidth())
+ throw new IllegalArgumentException();
+ for (int i = 0, off = 0; i < hlsIDsToConcat.length; i++)
+ {
+ int oldOff = off;
+ off += hlsWidthes[i];
+ component.setHighLevelState(hlsIDsToConcat[i], value.subVector(oldOff, off));
+ }
+ }
+
+ @Override
+ public void addListener(ModelComponent component, Consumer<BitVector> listener)
+ {
+ if (modelListenersPerRegisterListener.containsKey(listener))
+ return;
+
+ Consumer<Object> modelListener = v -> listener.accept(read(component));
+ for (String hlsID : hlsIDsToConcat)
+ component.addHighLevelStateListener(hlsID, modelListener);
+ }
+
+ @Override
+ public void removeListener(ModelComponent component, Consumer<BitVector> listener)
+ {
+ Consumer<Object> modelListener = modelListenersPerRegisterListener.get(listener);
+ if (modelListener == null)
+ return;
+
+ for (String hlsID : hlsIDsToConcat)
+ component.removeHighLevelStateListener(hlsID, modelListener);
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.machine.registers;
+
+import java.util.function.Consumer;
+
+import net.mograsim.logic.core.types.BitVector;
+import net.mograsim.logic.model.model.components.ModelComponent;
+
+public interface ModelComponentBasedRegister
+{
+ public BitVector read(ModelComponent component);
+
+ public void write(ModelComponent component, BitVector value);
+
+ public void addListener(ModelComponent component, Consumer<BitVector> listener);
+
+ public void removeListener(ModelComponent component, Consumer<BitVector> listener);
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.machine.registers;
+
+import net.mograsim.machine.Identifiable;
+
+/**
+ * A register in a machine is defined by this interface. A hardware register may have {@link Register#names() named sub-registers}.
+ *
+ *
+ * @author Christian Femers
+ *
+ */
+public interface Register extends Identifiable
+{
+ /**
+ * Returns the complete width in bits of the underlying hardware structure the register and possible sub-registers are part of.
+ *
+ * @param name the name of the register
+ * @return the width of the (sub-)register in bits.
+ *
+ * @see #names()
+ * @author Christian Femers
+ */
+ int getWidth();
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.machine.registers;
+
+import java.util.List;
+
+import net.mograsim.machine.Identifiable;
+
+public interface RegisterGroup extends Identifiable
+{
+ /**
+ * Returns all Registers contained in this group that are not part of a subgroup.
+ */
+ List<Register> getRegisters();
+
+ /**
+ * Returns the sub groups of this group. May very well be an empty set.
+ */
+ List<RegisterGroup> getSubGroups();
+}
--- /dev/null
+package net.mograsim.machine.registers;
+
+public class SimpleRegister implements Register
+{
+ private final String id;
+ private final int width;
+
+ public SimpleRegister(String id, int width)
+ {
+ this.id = id;
+ this.width = width;
+ }
+
+ @Override
+ public String id()
+ {
+ return id;
+ }
+
+ @Override
+ public int getWidth()
+ {
+ return width;
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.machine.registers;
+
+import java.util.List;
+
+public class SimpleRegisterGroup implements RegisterGroup
+{
+ private final String id;
+ private final List<Register> registers;
+ private final List<RegisterGroup> subgroups;
+
+ protected SimpleRegisterGroup(String id, Register... registers)
+ {
+ this(id, new RegisterGroup[0], registers);
+ }
+
+ protected SimpleRegisterGroup(String id, RegisterGroup... subgroups)
+ {
+ this(id, subgroups, new Register[0]);
+ }
+
+ protected SimpleRegisterGroup(String id, RegisterGroup[] subgroups, Register... registers)
+ {
+ this.id = id;
+ this.registers = List.of(registers);
+ this.subgroups = List.of(subgroups);
+ }
+
+ @Override
+ public String id()
+ {
+ return id;
+ }
+
+ @Override
+ public List<Register> getRegisters()
+ {
+ return registers;
+ }
+
+ @Override
+ public List<RegisterGroup> getSubGroups()
+ {
+ return subgroups;
+ }
+}
\ No newline at end of file
import net.mograsim.logic.core.types.BitVector;
import net.mograsim.machine.Machine;
-import net.mograsim.machine.Register;
+import net.mograsim.machine.registers.Register;
import net.mograsim.plugin.MograsimActivator;
public class MachineRegister extends PlatformObject implements IRegister
package net.mograsim.plugin.launch;
import java.util.List;
-import java.util.Set;
import java.util.stream.Collectors;
import org.eclipse.core.runtime.PlatformObject;
import org.eclipse.debug.core.model.IRegisterGroup;
import net.mograsim.machine.Machine;
-import net.mograsim.machine.Register;
+import net.mograsim.machine.registers.Register;
import net.mograsim.plugin.MograsimActivator;
-import net.mograsim.plugin.util.NumberRespectingStringComparator;
public class MachineRegisterGroup extends PlatformObject implements IRegisterGroup
{
private final MachineStackFrame stackFrame;
+ private final String name;
private final List<MachineRegister> registers;
- public MachineRegisterGroup(MachineStackFrame stackFrame)
+ public MachineRegisterGroup(MachineStackFrame stackFrame, String name, List<Register> registers)
{
this.stackFrame = stackFrame;
- Set<Register> machineRegisters = getMachine().getDefinition().getRegisters();
- this.registers = machineRegisters.stream()
- .sorted((r1, r2) -> NumberRespectingStringComparator.CASE_SENSITIVE.compare(r1.id(), r2.id()))
- .map(r -> new MachineRegister(this, r)).collect(Collectors.toUnmodifiableList());
+ this.name = name;
+ this.registers = registers.stream().map(r -> new MachineRegister(this, r)).collect(Collectors.toUnmodifiableList());
}
@Override
@Override
public String getName() throws DebugException
{
- return "pseudo register group";
+ return name;
}
@Override
@Override
public boolean hasRegisters() throws DebugException
{
- return true;
+ return hasRegistersSafe();
+ }
+
+ public boolean hasRegistersSafe()
+ {
+ return registers.size() > 0;
}
}
\ No newline at end of file
package net.mograsim.plugin.launch;
+import java.util.ArrayList;
+import java.util.Collections;
+import java.util.List;
+
import org.eclipse.core.runtime.PlatformObject;
import org.eclipse.debug.core.DebugException;
import org.eclipse.debug.core.ILaunch;
import org.eclipse.debug.core.model.IVariable;
import net.mograsim.machine.Machine;
+import net.mograsim.machine.MachineDefinition;
+import net.mograsim.machine.registers.RegisterGroup;
import net.mograsim.plugin.MograsimActivator;
public class MachineStackFrame extends PlatformObject implements IStackFrame
{
private final MachineThread thread;
- private final MachineRegisterGroup registerGroup;
+ private final List<MachineRegisterGroup> registerGroups;
public MachineStackFrame(MachineThread thread)
{
this.thread = thread;
- this.registerGroup = new MachineRegisterGroup(this);
+ List<MachineRegisterGroup> registerGroupsModifiable = new ArrayList<>();
+ MachineDefinition machDef = getMachine().getDefinition();
+ if (!machDef.getUnsortedRegisters().isEmpty())
+ registerGroupsModifiable.add(new MachineRegisterGroup(this, "<unsorted>", machDef.getUnsortedRegisters()));
+ addRegisterGroups(null, registerGroupsModifiable, machDef.getRegisterGroups());
+ this.registerGroups = Collections.unmodifiableList(registerGroupsModifiable);
+ }
+
+ private void addRegisterGroups(String base, List<MachineRegisterGroup> target, List<RegisterGroup> registerGroups)
+ {
+ for (RegisterGroup rg : registerGroups)
+ {
+ String name = (base == null ? "" : base + '.') + rg.id();
+ target.add(new MachineRegisterGroup(this, name, rg.getRegisters()));
+ addRegisterGroups(name, target, rg.getSubGroups());
+ }
}
@Override
@Override
public IRegisterGroup[] getRegisterGroups() throws DebugException
{
- return new IRegisterGroup[] { registerGroup };
+ return registerGroups.toArray(IRegisterGroup[]::new);
}
@Override
projects / Mograsim.git / commitdiff