ExportAm2900 now prints module headers for "atomic" components
authorDaniel Kirschten <daniel.kirschten@gmx.de>
Sun, 13 Dec 2020 03:00:42 +0000 (04:00 +0100)
committerDaniel Kirschten <daniel.kirschten@gmx.de>
Thu, 14 Jan 2021 14:44:02 +0000 (15:44 +0100)
tests/net.mograsim.logic.model.verilog.tests/src/net/mograsim/logic/model/verilog/examples/ExportAm2900.java

index 3e0f33d..08712a0 100644 (file)
@@ -33,6 +33,8 @@ import net.mograsim.logic.model.serializing.IndirectModelComponentCreator;
 import net.mograsim.logic.model.verilog.converter.ModelComponentToVerilogComponentDeclarationMapping;
 import net.mograsim.logic.model.verilog.converter.ModelComponentToVerilogConverter;
 import net.mograsim.logic.model.verilog.helper.UnionFind;
+import net.mograsim.logic.model.verilog.model.IOPort;
+import net.mograsim.logic.model.verilog.model.VerilogComponentDeclaration;
 import net.mograsim.logic.model.verilog.model.VerilogComponentImplementation;
 
 public class ExportAm2900
@@ -96,6 +98,9 @@ public class ExportAm2900
                        ModelComponentToVerilogComponentDeclarationMapping generateCanonicalDeclarationMapping = ModelComponentToVerilogConverter
                                        .generateCanonicalDeclarationMapping(c, new UnionFind<>(), id, params,
                                                        ModelComponentToVerilogConverter.sanitizeVerilogID("mgs_" + id + (params.isJsonNull() ? "" : "_" + params)));
+                       VerilogComponentDeclaration d = generateCanonicalDeclarationMapping.getVerilogComponentDeclaration();
+                       System.out.println("module " + d.getID() + " "
+                                       + d.getIOPorts().stream().map(IOPort::toDeclarationVerilogCode).collect(Collectors.joining(", ", "(", ")")) + ";");
                        return generateCanonicalDeclarationMapping;
                }).collect(Collectors.toSet());