From: Daniel Kirschten Date: Tue, 31 Mar 2020 15:26:18 +0000 (+0200) Subject: Created a gate-based implementation of dff4_finewe X-Git-Url: https://mograsim.net/gitweb/?a=commitdiff_plain;h=92ef68de7afb4f0e7f9c211c8ef297ffc1e9a341;p=Mograsim.git Created a gate-based implementation of dff4_finewe --- diff --git a/plugins/net.mograsim.logic.model.am2900/components/net/mograsim/logic/model/am2900/components/dff4_finewe.json b/plugins/net.mograsim.logic.model.am2900/components/net/mograsim/logic/model/am2900/components/dff4_finewe.json new file mode 100755 index 00000000..e3568aa6 --- /dev/null +++ b/plugins/net.mograsim.logic.model.am2900/components/net/mograsim/logic/model/am2900/components/dff4_finewe.json @@ -0,0 +1,833 @@ +{ + "width": 35.0, + "height": 90.0, + "interfacePins": [ + { + "location": { + "x": 0.0, + "y": 5.0 + }, + "name": "C", + "logicWidth": 1, + "usage": "INPUT" + }, + { + "location": { + "x": 0.0, + "y": 55.0 + }, + "name": "D1", + "logicWidth": 1, + "usage": "INPUT" + }, + { + "location": { + "x": 0.0, + "y": 65.0 + }, + "name": "D2", + "logicWidth": 1, + "usage": "INPUT" + }, + { + "location": { + "x": 0.0, + "y": 75.0 + }, + "name": "D3", + "logicWidth": 1, + "usage": "INPUT" + }, + { + "location": { + "x": 0.0, + "y": 85.0 + }, + "name": "D4", + "logicWidth": 1, + "usage": "INPUT" + }, + { + "location": { + "x": 35.0, + "y": 5.0 + }, + "name": "Q1", + "logicWidth": 1, + "usage": "OUTPUT" + }, + { + "location": { + "x": 35.0, + "y": 15.0 + }, + "name": "Q2", + "logicWidth": 1, + "usage": "OUTPUT" + }, + { + "location": { + "x": 35.0, + "y": 25.0 + }, + "name": "Q3", + "logicWidth": 1, + "usage": "OUTPUT" + }, + { + "location": { + "x": 35.0, + "y": 35.0 + }, + "name": "Q4", + "logicWidth": 1, + "usage": "OUTPUT" + }, + { + "location": { + "x": 0.0, + "y": 15.0 + }, + "name": "_WE1", + "logicWidth": 1, + "usage": "INPUT" + }, + { + "location": { + "x": 0.0, + "y": 25.0 + }, + "name": "_WE2", + "logicWidth": 1, + "usage": "INPUT" + }, + { + "location": { + "x": 0.0, + "y": 35.0 + }, + "name": "_WE3", + "logicWidth": 1, + "usage": "INPUT" + }, + { + "location": { + "x": 0.0, + "y": 45.0 + }, + "name": "_WE4", + "logicWidth": 1, + "usage": "INPUT" + } + ], + "innerScale": 0.2, + "submodel": { + "components": [ + { + "id": "WireCrossPoint", + "name": "WireCrossPoint#0", + "pos": { + "x": 109.0, + "y": 34.0 + }, + "params": 1 + }, + { + "id": "WireCrossPoint", + "name": "WireCrossPoint#1", + "pos": { + "x": 109.0, + "y": 84.0 + }, + "params": 1 + }, + { + "id": "WireCrossPoint", + "name": "WireCrossPoint#2", + "pos": { + "x": 109.0, + "y": 134.0 + }, + "params": 1 + }, + { + "id": "WireCrossPoint", + "name": "WireCrossPoint#3", + "pos": { + "x": 159.0, + "y": 24.0 + }, + "params": 1 + }, + { + "id": "WireCrossPoint", + "name": "WireCrossPoint#4", + "pos": { + "x": 159.0, + "y": 74.0 + }, + "params": 1 + }, + { + "id": "WireCrossPoint", + "name": "WireCrossPoint#5", + "pos": { + "x": 159.0, + "y": 124.0 + }, + "params": 1 + }, + { + "id": "WireCrossPoint", + "name": "WireCrossPoint#6", + "pos": { + "x": 159.0, + "y": 174.0 + }, + "params": 1 + }, + { + "id": "dff", + "name": "dff#0", + "pos": { + "x": 115.0, + "y": 20.0 + } + }, + { + "id": "dff", + "name": "dff#1", + "pos": { + "x": 115.0, + "y": 70.0 + } + }, + { + "id": "dff", + "name": "dff#2", + "pos": { + "x": 115.0, + "y": 120.0 + } + }, + { + "id": "dff", + "name": "dff#3", + "pos": { + "x": 115.0, + "y": 170.0 + } + }, + { + "id": "mux1", + "name": "mux1#0", + "pos": { + "x": 65.0, + "y": 20.0 + } + }, + { + "id": "mux1", + "name": "mux1#1", + "pos": { + "x": 65.0, + "y": 70.0 + } + }, + { + "id": "mux1", + "name": "mux1#2", + "pos": { + "x": 65.0, + "y": 120.0 + } + }, + { + "id": "mux1", + "name": "mux1#3", + "pos": { + "x": 65.0, + "y": 170.0 + } + } + ], + "wires": [ + { + "pin1": { + "compName": "WireCrossPoint#0", + "pinName": "" + }, + "pin2": { + "compName": "dff#0", + "pinName": "C" + }, + "name": "unnamedWire#0", + "path": [] + }, + { + "pin1": { + "compName": "mux1#0", + "pinName": "Y" + }, + "pin2": { + "compName": "dff#0", + "pinName": "D" + }, + "name": "unnamedWire#1", + "path": [] + }, + { + "pin1": { + "compName": "dff#1", + "pinName": "D" + }, + "pin2": { + "compName": "mux1#1", + "pinName": "Y" + }, + "name": "unnamedWire#2", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#2", + "pinName": "" + }, + "pin2": { + "compName": "dff#3", + "pinName": "C" + }, + "name": "unnamedWire#3", + "path": [ + { + "x": 110.0, + "y": 185.0 + } + ] + }, + { + "pin1": { + "compName": "WireCrossPoint#0", + "pinName": "" + }, + "pin2": { + "compName": "WireCrossPoint#1", + "pinName": "" + }, + "name": "unnamedWire#4", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#1", + "pinName": "" + }, + "pin2": { + "compName": "dff#1", + "pinName": "C" + }, + "name": "unnamedWire#5", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#1", + "pinName": "" + }, + "pin2": { + "compName": "WireCrossPoint#2", + "pinName": "" + }, + "name": "unnamedWire#6", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#2", + "pinName": "" + }, + "pin2": { + "compName": "dff#2", + "pinName": "C" + }, + "name": "unnamedWire#7", + "path": [] + }, + { + "pin1": { + "compName": "_submodelinterface", + "pinName": "C" + }, + "pin2": { + "compName": "WireCrossPoint#0", + "pinName": "" + }, + "name": "unnamedWire#8", + "path": [ + { + "x": 10.0, + "y": 25.0 + }, + { + "x": 10.0, + "y": 15.0 + }, + { + "x": 110.0, + "y": 15.0 + } + ] + }, + { + "pin1": { + "compName": "mux1#2", + "pinName": "Y" + }, + "pin2": { + "compName": "dff#2", + "pinName": "D" + }, + "name": "unnamedWire#9", + "path": [] + }, + { + "pin1": { + "compName": "dff#3", + "pinName": "D" + }, + "pin2": { + "compName": "mux1#3", + "pinName": "Y" + }, + "name": "unnamedWire#10", + "path": [] + }, + { + "pin1": { + "compName": "mux1#1", + "pinName": "I1" + }, + "pin2": { + "compName": "WireCrossPoint#4", + "pinName": "" + }, + "name": "unnamedWire#11", + "path": [ + { + "x": 60.0, + "y": 95.0 + }, + { + "x": 60.0, + "y": 105.0 + }, + { + "x": 160.0, + "y": 105.0 + } + ] + }, + { + "pin1": { + "compName": "WireCrossPoint#3", + "pinName": "" + }, + "pin2": { + "compName": "mux1#0", + "pinName": "I1" + }, + "name": "unnamedWire#12", + "path": [ + { + "x": 160.0, + "y": 55.0 + }, + { + "x": 60.0, + "y": 55.0 + }, + { + "x": 60.0, + "y": 45.0 + } + ] + }, + { + "pin1": { + "compName": "dff#0", + "pinName": "Q" + }, + "pin2": { + "compName": "WireCrossPoint#3", + "pinName": "" + }, + "name": "unnamedWire#13", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#3", + "pinName": "" + }, + "pin2": { + "compName": "_submodelinterface", + "pinName": "Q1" + }, + "name": "unnamedWire#14", + "path": [] + }, + { + "pin1": { + "compName": "_submodelinterface", + "pinName": "Q2" + }, + "pin2": { + "compName": "WireCrossPoint#4", + "pinName": "" + }, + "name": "unnamedWire#15", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#4", + "pinName": "" + }, + "pin2": { + "compName": "dff#1", + "pinName": "Q" + }, + "name": "unnamedWire#16", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#5", + "pinName": "" + }, + "pin2": { + "compName": "mux1#2", + "pinName": "I1" + }, + "name": "unnamedWire#17", + "path": [ + { + "x": 160.0, + "y": 155.0 + }, + { + "x": 60.0, + "y": 155.0 + }, + { + "x": 60.0, + "y": 145.0 + } + ] + }, + { + "pin1": { + "compName": "dff#2", + "pinName": "Q" + }, + "pin2": { + "compName": "WireCrossPoint#5", + "pinName": "" + }, + "name": "unnamedWire#18", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#5", + "pinName": "" + }, + "pin2": { + "compName": "_submodelinterface", + "pinName": "Q3" + }, + "name": "unnamedWire#19", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#6", + "pinName": "" + }, + "pin2": { + "compName": "_submodelinterface", + "pinName": "Q4" + }, + "name": "unnamedWire#20", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#6", + "pinName": "" + }, + "pin2": { + "compName": "dff#3", + "pinName": "Q" + }, + "name": "unnamedWire#21", + "path": [] + }, + { + "pin1": { + "compName": "WireCrossPoint#6", + "pinName": "" + }, + "pin2": { + "compName": "mux1#3", + "pinName": "I1" + }, + "name": "unnamedWire#22", + "path": [ + { + "x": 160.0, + "y": 205.0 + }, + { + "x": 60.0, + "y": 205.0 + }, + { + "x": 60.0, + "y": 195.0 + } + ] + }, + { + "pin1": { + "compName": "_submodelinterface", + "pinName": "_WE1" + }, + "pin2": { + "compName": "mux1#0", + "pinName": "S0" + }, + "name": "unnamedWire#23", + "path": [ + { + "x": 15.0, + "y": 75.0 + }, + { + "x": 15.0, + "y": 25.0 + } + ] + }, + { + "pin1": { + "compName": "mux1#3", + "pinName": "I0" + }, + "pin2": { + "compName": "_submodelinterface", + "pinName": "D4" + }, + "name": "unnamedWire#24", + "path": [ + { + "x": 55.0, + "y": 185.0 + }, + { + "x": 55.0, + "y": 425.0 + } + ] + }, + { + "pin1": { + "compName": "_submodelinterface", + "pinName": "D3" + }, + "pin2": { + "compName": "mux1#2", + "pinName": "I0" + }, + "name": "unnamedWire#25", + "path": [ + { + "x": 50.0, + "y": 375.0 + }, + { + "x": 50.0, + "y": 135.0 + } + ] + }, + { + "pin1": { + "compName": "mux1#1", + "pinName": "I0" + }, + "pin2": { + "compName": "_submodelinterface", + "pinName": "D2" + }, + "name": "unnamedWire#26", + "path": [ + { + "x": 45.0, + "y": 85.0 + }, + { + "x": 45.0, + "y": 325.0 + } + ] + }, + { + "pin1": { + "compName": "_submodelinterface", + "pinName": "D1" + }, + "pin2": { + "compName": "mux1#0", + "pinName": "I0" + }, + "name": "unnamedWire#27", + "path": [ + { + "x": 40.0, + "y": 275.0 + }, + { + "x": 40.0, + "y": 35.0 + } + ] + }, + { + "pin1": { + "compName": "mux1#2", + "pinName": "S0" + }, + "pin2": { + "compName": "_submodelinterface", + "pinName": "_WE3" + }, + "name": "unnamedWire#28", + "path": [ + { + "x": 25.0, + "y": 125.0 + }, + { + "x": 25.0, + "y": 175.0 + } + ] + }, + { + "pin1": { + "compName": "_submodelinterface", + "pinName": "_WE4" + }, + "pin2": { + "compName": "mux1#3", + "pinName": "S0" + }, + "name": "unnamedWire#29", + "path": [ + { + "x": 30.0, + "y": 225.0 + }, + { + "x": 30.0, + "y": 175.0 + } + ] + }, + { + "pin1": { + "compName": "mux1#1", + "pinName": "S0" + }, + "pin2": { + "compName": "_submodelinterface", + "pinName": "_WE2" + }, + "name": "unnamedWire#30", + "path": [ + { + "x": 20.0, + "y": 75.0 + }, + { + "x": 20.0, + "y": 125.0 + } + ] + } + ], + "version": "0.1.1" + }, + "symbolRendererSnippetID": "simpleRectangularLike", + "symbolRendererParams": { + "centerText": "D flip flop\n4 bit", + "centerTextHeight": 5.0, + "horizontalComponentCenter": 17.5, + "pinLabelHeight": 3.5, + "pinLabelMargin": 0.5 + }, + "outlineRendererSnippetID": "default", + "highLevelStateHandlerSnippetID": "standard", + "highLevelStateHandlerParams": { + "subcomponentHighLevelStates": {}, + "atomicHighLevelStates": { + "q": { + "id": "bitVectorSplitting", + "params": { + "vectorPartTargets": [ + "q4", + "q3", + "q2", + "q1" + ], + "vectorPartLengthes": [ + 1, + 1, + 1, + 1 + ] + } + }, + "q1": { + "id": "delegating", + "params": { + "delegateTarget": "dff#0", + "subStateID": "q" + } + }, + "q2": { + "id": "delegating", + "params": { + "delegateTarget": "dff#1", + "subStateID": "q" + } + }, + "q3": { + "id": "delegating", + "params": { + "delegateTarget": "dff#2", + "subStateID": "q" + } + }, + "q4": { + "id": "delegating", + "params": { + "delegateTarget": "dff#3", + "subStateID": "q" + } + } + } + }, + "version": "0.1.5" +} \ No newline at end of file diff --git a/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/am2900/components/Modeldff4_finewe.java b/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/am2900/components/Modeldff4_finewe.java deleted file mode 100644 index 6aebcbd6..00000000 --- a/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/am2900/components/Modeldff4_finewe.java +++ /dev/null @@ -1,139 +0,0 @@ -package net.mograsim.logic.model.am2900.components; - -import static net.mograsim.logic.core.types.Bit.ONE; -import static net.mograsim.logic.core.types.Bit.U; -import static net.mograsim.logic.core.types.Bit.X; -import static net.mograsim.logic.core.types.Bit.Z; -import static net.mograsim.logic.core.types.Bit.ZERO; - -import java.util.Arrays; -import java.util.Map; - -import net.mograsim.logic.core.types.Bit; -import net.mograsim.logic.core.types.BitVector; -import net.mograsim.logic.core.wires.CoreWire.ReadEnd; -import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd; -import net.mograsim.logic.model.model.LogicModelModifiable; -import net.mograsim.logic.model.model.components.atomic.SimpleRectangularHardcodedModelComponent; -import net.mograsim.logic.model.model.wires.Pin; -import net.mograsim.logic.model.model.wires.PinUsage; -import net.mograsim.logic.model.serializing.IndirectModelComponentCreator; -import net.mograsim.logic.model.snippets.symbolrenderers.PinNamesSymbolRenderer.PinNamesParams.Position; - -public class Modeldff4_finewe extends SimpleRectangularHardcodedModelComponent -{ - public Modeldff4_finewe(LogicModelModifiable model, String name) - { - super(model, "dff4_finewe", name, "D flip flop\n4 bits", false); - setSize(35, 90); - addPin(new Pin(model, this, "C", 1, PinUsage.INPUT, 0, 5), Position.RIGHT); - addPin(new Pin(model, this, "_WE1", 1, PinUsage.INPUT, 0, 15), Position.RIGHT); - addPin(new Pin(model, this, "_WE2", 1, PinUsage.INPUT, 0, 25), Position.RIGHT); - addPin(new Pin(model, this, "_WE3", 1, PinUsage.INPUT, 0, 35), Position.RIGHT); - addPin(new Pin(model, this, "_WE4", 1, PinUsage.INPUT, 0, 45), Position.RIGHT); - addPin(new Pin(model, this, "D1", 1, PinUsage.INPUT, 0, 55), Position.RIGHT); - addPin(new Pin(model, this, "D2", 1, PinUsage.INPUT, 0, 65), Position.RIGHT); - addPin(new Pin(model, this, "D3", 1, PinUsage.INPUT, 0, 75), Position.RIGHT); - addPin(new Pin(model, this, "D4", 1, PinUsage.INPUT, 0, 85), Position.RIGHT); - addPin(new Pin(model, this, "Q1", 1, PinUsage.OUTPUT, 35, 5), Position.LEFT); - addPin(new Pin(model, this, "Q2", 1, PinUsage.OUTPUT, 35, 15), Position.LEFT); - addPin(new Pin(model, this, "Q3", 1, PinUsage.OUTPUT, 35, 25), Position.LEFT); - addPin(new Pin(model, this, "Q4", 1, PinUsage.OUTPUT, 35, 35), Position.LEFT); - - init(); - } - - @Override - public Object recalculate(Object lastState, Map readEnds, Map readWriteEnds) - { - Bit[] QC = castAndInitState(lastState); - - Bit CVal = readEnds.get("C").getValue(); - - if (QC[0] == ZERO && CVal == ONE) - for (int i = 1; i < 5; i++) - { - Bit WEiVal = readEnds.get("_WE" + i).getValue(); - if (WEiVal == X || WEiVal == Z) - QC[i] = X; - else if (WEiVal == U) - QC[i] = U; - else if (WEiVal == ZERO) - QC[i] = readEnds.get("D" + i).getValue(); - } - - QC[0] = CVal; - - readWriteEnds.get("Q1").feedSignals(QC[1]); - readWriteEnds.get("Q2").feedSignals(QC[2]); - readWriteEnds.get("Q3").feedSignals(QC[3]); - readWriteEnds.get("Q4").feedSignals(QC[4]); - - return QC; - } - - @Override - protected Object getHighLevelState(Object state, String stateID) - { - Bit[] QC = castAndInitState(state); - - if ("q".equals(stateID)) - return BitVector.of(Arrays.copyOfRange(QC, 1, 5)); - if (stateID.length() == 2 && stateID.charAt(0) == 'q') - { - char secondChar = stateID.charAt(1); - if (secondChar >= '1' && secondChar <= '4') - return BitVector.of(QC[secondChar - '0']); - } - return super.getHighLevelState(state, stateID); - } - - @Override - protected Object setHighLevelState(Object lastState, String stateID, Object newHighLevelState) - { - Bit[] QC = castAndInitState(lastState); - - if ("q".equals(stateID)) - { - BitVector newHighLevelStateCasted = (BitVector) newHighLevelState; - if (newHighLevelStateCasted.length() != 4) - throw new IllegalArgumentException("Expected BitVector of length 4, not " + newHighLevelStateCasted.length()); - System.arraycopy(newHighLevelStateCasted.getBits(), 0, QC, 1, 4); - return QC; - } - if (stateID.length() == 2 && stateID.charAt(0) == 'q') - { - char secondChar = stateID.charAt(1); - if (secondChar >= '1' && secondChar <= '4') - { - Bit newHighLevelStateCasted; - if (newHighLevelState instanceof Bit) - newHighLevelStateCasted = (Bit) newHighLevelState; - else - { - BitVector vector = (BitVector) newHighLevelState; - if (vector.length() != 1) - throw new IllegalArgumentException("Expected BitVector of length 1, not " + vector.length()); - newHighLevelStateCasted = vector.getMSBit(0); - } - QC[secondChar - '0'] = newHighLevelStateCasted; - return QC; - } - } - return super.setHighLevelState(QC, stateID, newHighLevelState); - } - - private static Bit[] castAndInitState(Object state) - { - Bit[] QC = (Bit[]) state; - if (QC == null) - QC = new Bit[] { U, U, U, U, U }; - return QC; - } - - static - { - IndirectModelComponentCreator.setComponentSupplier(Modeldff4_finewe.class.getCanonicalName(), - (m, p, n) -> new Modeldff4_finewe(m, n)); - } -} \ No newline at end of file diff --git a/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/am2900/standardComponentIDMapping.json b/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/am2900/standardComponentIDMapping.json index 6c74d065..273c582b 100644 --- a/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/am2900/standardComponentIDMapping.json +++ b/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/am2900/standardComponentIDMapping.json @@ -6,7 +6,6 @@ "Am2904ShiftInstrDecode": "resloader:Am2900Loader:class:net.mograsim.logic.model.am2900.components.am2904.ModelAm2904ShiftInstrDecode", "Am2910RegCntr": "resloader:Am2900Loader:class:net.mograsim.logic.model.am2900.components.am2910.ModelAm2910RegCntr", "Am2910SP": "resloader:Am2900Loader:class:net.mograsim.logic.model.am2900.components.am2910.ModelAm2910SP", - "dff4_finewe": "resloader:Am2900Loader:class:net.mograsim.logic.model.am2900.components.Modeldff4_finewe", "inc": "resloader:Am2900Loader:class:net.mograsim.logic.model.am2900.components.Modelinc", "ram5_12": "resloader:Am2900Loader:class:net.mograsim.logic.model.am2900.components.Modelram5_12", "sel4_12": "resloader:Am2900Loader:class:net.mograsim.logic.model.am2900.components.Modelsel4_12", @@ -31,6 +30,7 @@ "demux2": "resloader:Am2900Loader:jsonres:net/mograsim/logic/model/am2900/components/demux2.json", "dff": "resloader:Am2900Loader:jsonres:net/mograsim/logic/model/am2900/components/dff.json", "dff4": "resloader:Am2900Loader:jsonres:net/mograsim/logic/model/am2900/components/dff4.json", + "dff4_finewe": "resloader:Am2900Loader:jsonres:net/mograsim/logic/model/am2900/components/dff4_finewe.json", "dff4_invwe": "resloader:Am2900Loader:jsonres:net/mograsim/logic/model/am2900/components/dff4_invwe.json", "dff8": "resloader:Am2900Loader:jsonres:net/mograsim/logic/model/am2900/components/dff8.json", "dff12": "resloader:Am2900Loader:jsonres:net/mograsim/logic/model/am2900/components/dff12.json", diff --git a/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/examples/ModelComponentTestbench.java b/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/examples/ModelComponentTestbench.java index 4d49fde3..f694f1a0 100644 --- a/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/examples/ModelComponentTestbench.java +++ b/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/examples/ModelComponentTestbench.java @@ -27,7 +27,7 @@ public class ModelComponentTestbench { Am2900Loader.setup(); // ModelComponent comp = new StrictAm2900MachineDefinition().createNew(model).getAm2900(); - ModelComponent comp = IndirectModelComponentCreator.createComponent(model, "Am2910"); + ModelComponent comp = IndirectModelComponentCreator.createComponent(model, "dff4_finewe"); List inputPinNames = new ArrayList<>(); List outputPinNames = new ArrayList<>();