From: Daniel Kirschten <daniel.kirschten@gmx.de>
Date: Wed, 2 Oct 2019 17:05:04 +0000 (+0200)
Subject: CoreClock now starts as 1 to make Am2900Machine work again
X-Git-Url: https://mograsim.net/gitweb/?a=commitdiff_plain;h=99767fcd36ffe9d9d25a3cf4fd9ee1a623285834;p=Mograsim.git

CoreClock now starts as 1 to make Am2900Machine work again
---

diff --git a/plugins/net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreClock.java b/plugins/net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreClock.java
index 84608b4d..e186928b 100644
--- a/plugins/net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreClock.java
+++ b/plugins/net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreClock.java
@@ -17,7 +17,7 @@ import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
 public class CoreClock extends CoreComponent implements TimelineEventHandler, LogicObservable
 {
 	private Collection<LogicObserver> observers;
-	private boolean isOn = true;// first update switches to 0
+	private boolean isOn = false;// first update switches to 1; so the clock starts as 1.
 	private ReadWriteEnd out;
 	private int delta;