From 4db274c53e53cda8321067eca57d524f188c2e6f Mon Sep 17 00:00:00 2001 From: Daniel Kirschten Date: Sun, 1 Sep 2019 23:48:54 +0200 Subject: [PATCH] Remove legacy, broken Connector; rename Merger&Splitter to avoid mixups --- .../logic/core/components/Connector.java | 76 --------------- ...{Merger.java => UnidirectionalMerger.java} | 4 +- ...itter.java => UnidirectionalSplitter.java} | 4 +- .../logic/core/tests/ComponentTest.java | 94 ++----------------- 4 files changed, 10 insertions(+), 168 deletions(-) delete mode 100644 net.mograsim.logic.core/src/net/mograsim/logic/core/components/Connector.java rename net.mograsim.logic.core/src/net/mograsim/logic/core/components/{Merger.java => UnidirectionalMerger.java} (91%) rename net.mograsim.logic.core/src/net/mograsim/logic/core/components/{Splitter.java => UnidirectionalSplitter.java} (88%) diff --git a/net.mograsim.logic.core/src/net/mograsim/logic/core/components/Connector.java b/net.mograsim.logic.core/src/net/mograsim/logic/core/components/Connector.java deleted file mode 100644 index 528852ed..00000000 --- a/net.mograsim.logic.core/src/net/mograsim/logic/core/components/Connector.java +++ /dev/null @@ -1,76 +0,0 @@ -package net.mograsim.logic.core.components; - -import java.util.List; - -import net.mograsim.logic.core.LogicObservable; -import net.mograsim.logic.core.LogicObserver; -import net.mograsim.logic.core.timeline.Timeline; -import net.mograsim.logic.core.wires.Wire.ReadEnd; -import net.mograsim.logic.core.wires.Wire.ReadWriteEnd; - -public class Connector extends Component implements LogicObserver -{ - private boolean connected; - private final ReadWriteEnd a; - private final ReadWriteEnd b; - - public Connector(Timeline timeline, ReadWriteEnd a, ReadWriteEnd b) - { - super(timeline); - if (a.width() != b.width()) - throw new IllegalArgumentException(String.format("WireArray width does not match: %d, %d", a.width(), b.width())); - this.a = a; - this.b = b; - a.registerObserver(this); - b.registerObserver(this); - } - - public void connect() - { - connected = true; - update(a); - update(b); - } - - public void disconnect() - { - connected = false; - a.clearSignals(); - b.clearSignals(); - } - - public void setConnection(boolean connected) - { - if (connected) - connect(); - else - disconnect(); - } - - @Override - public void update(LogicObservable initiator) - { - if (connected) - timeline.addEvent(e -> innerUpdate(initiator), 1); - } - - private void innerUpdate(LogicObservable initiator) - { - if (initiator == a) - b.feedSignals(a.wireValuesExcludingMe()); - else - a.feedSignals(b.wireValuesExcludingMe()); - } - - @Override - public List getAllInputs() - { - return List.of(a, b); - } - - @Override - public List getAllOutputs() - { - return List.of(a, b); - } -} diff --git a/net.mograsim.logic.core/src/net/mograsim/logic/core/components/Merger.java b/net.mograsim.logic.core/src/net/mograsim/logic/core/components/UnidirectionalMerger.java similarity index 91% rename from net.mograsim.logic.core/src/net/mograsim/logic/core/components/Merger.java rename to net.mograsim.logic.core/src/net/mograsim/logic/core/components/UnidirectionalMerger.java index acc05d3c..f1c3f8bc 100644 --- a/net.mograsim.logic.core/src/net/mograsim/logic/core/components/Merger.java +++ b/net.mograsim.logic.core/src/net/mograsim/logic/core/components/UnidirectionalMerger.java @@ -9,7 +9,7 @@ import net.mograsim.logic.core.wires.Wire; import net.mograsim.logic.core.wires.Wire.ReadEnd; import net.mograsim.logic.core.wires.Wire.ReadWriteEnd; -public class Merger extends Component implements LogicObserver +public class UnidirectionalMerger extends Component implements LogicObserver { private ReadWriteEnd out; private ReadEnd[] inputs; @@ -20,7 +20,7 @@ public class Merger extends Component implements LogicObserver * @param union The output of merging n {@link Wire}s into one. Must have width = a1.width() + a2.width() + ... + an.width(). * @param inputs The inputs to be merged into the union */ - public Merger(Timeline timeline, ReadWriteEnd union, ReadEnd... inputs) + public UnidirectionalMerger(Timeline timeline, ReadWriteEnd union, ReadEnd... inputs) { super(timeline); this.inputs = inputs; diff --git a/net.mograsim.logic.core/src/net/mograsim/logic/core/components/Splitter.java b/net.mograsim.logic.core/src/net/mograsim/logic/core/components/UnidirectionalSplitter.java similarity index 88% rename from net.mograsim.logic.core/src/net/mograsim/logic/core/components/Splitter.java rename to net.mograsim.logic.core/src/net/mograsim/logic/core/components/UnidirectionalSplitter.java index 04658fe4..13816adb 100644 --- a/net.mograsim.logic.core/src/net/mograsim/logic/core/components/Splitter.java +++ b/net.mograsim.logic.core/src/net/mograsim/logic/core/components/UnidirectionalSplitter.java @@ -9,12 +9,12 @@ import net.mograsim.logic.core.types.BitVector; import net.mograsim.logic.core.wires.Wire.ReadEnd; import net.mograsim.logic.core.wires.Wire.ReadWriteEnd; -public class Splitter extends Component implements LogicObserver +public class UnidirectionalSplitter extends Component implements LogicObserver { private ReadEnd input; private ReadWriteEnd[] outputs; - public Splitter(Timeline timeline, ReadEnd input, ReadWriteEnd... outputs) + public UnidirectionalSplitter(Timeline timeline, ReadEnd input, ReadWriteEnd... outputs) { super(timeline); this.input = input; diff --git a/net.mograsim.logic.core/test/net/mograsim/logic/core/tests/ComponentTest.java b/net.mograsim.logic.core/test/net/mograsim/logic/core/tests/ComponentTest.java index e61299ed..464db587 100644 --- a/net.mograsim.logic.core/test/net/mograsim/logic/core/tests/ComponentTest.java +++ b/net.mograsim.logic.core/test/net/mograsim/logic/core/tests/ComponentTest.java @@ -4,24 +4,15 @@ import static org.junit.jupiter.api.Assertions.assertArrayEquals; import static org.junit.jupiter.api.Assertions.assertEquals; import static org.junit.jupiter.api.Assertions.fail; -import java.math.BigInteger; -import java.util.Random; -import java.util.function.LongConsumer; - -import org.junit.Ignore; -import org.junit.jupiter.api.BeforeAll; import org.junit.jupiter.api.BeforeEach; import org.junit.jupiter.api.Disabled; import org.junit.jupiter.api.Test; -import org.junit.jupiter.api.TestInstance; -import org.junit.jupiter.api.TestInstance.Lifecycle; -import net.mograsim.logic.core.components.Connector; import net.mograsim.logic.core.components.Demux; -import net.mograsim.logic.core.components.Merger; import net.mograsim.logic.core.components.Mux; -import net.mograsim.logic.core.components.Splitter; import net.mograsim.logic.core.components.TriStateBuffer; +import net.mograsim.logic.core.components.UnidirectionalMerger; +import net.mograsim.logic.core.components.UnidirectionalSplitter; import net.mograsim.logic.core.components.gates.AndGate; import net.mograsim.logic.core.components.gates.NandGate; import net.mograsim.logic.core.components.gates.NorGate; @@ -54,9 +45,9 @@ class ComponentTest k = new Wire(t, 1, 1); new AndGate(t, 1, f.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd()); new NotGate(t, 1, f.createReadOnlyEnd(), g.createReadWriteEnd()); - new Merger(t, h.createReadWriteEnd(), c.createReadOnlyEnd(), g.createReadOnlyEnd()); + new UnidirectionalMerger(t, h.createReadWriteEnd(), c.createReadOnlyEnd(), g.createReadOnlyEnd()); new Mux(t, 1, i.createReadWriteEnd(), e.createReadOnlyEnd(), h.createReadOnlyEnd(), d.createReadOnlyEnd()); - new Splitter(t, i.createReadOnlyEnd(), k.createReadWriteEnd(), j.createReadWriteEnd()); + new UnidirectionalSplitter(t, i.createReadOnlyEnd(), k.createReadWriteEnd(), j.createReadWriteEnd()); a.createReadWriteEnd().feedSignals(Bit.ZERO); b.createReadWriteEnd().feedSignals(Bit.ONE); @@ -75,7 +66,7 @@ class ComponentTest { Wire a = new Wire(t, 3, 1), b = new Wire(t, 2, 1), c = new Wire(t, 3, 1), in = new Wire(t, 8, 1); in.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE); - new Splitter(t, in.createReadOnlyEnd(), a.createReadWriteEnd(), b.createReadWriteEnd(), c.createReadWriteEnd()); + new UnidirectionalSplitter(t, in.createReadOnlyEnd(), a.createReadWriteEnd(), b.createReadWriteEnd(), c.createReadWriteEnd()); t.executeAll(); @@ -92,7 +83,7 @@ class ComponentTest b.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO); c.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE); - new Merger(t, out.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd()); + new UnidirectionalMerger(t, out.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd()); t.executeAll(); @@ -465,79 +456,6 @@ class ComponentTest assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.Z); } - @Disabled("Braucht den Connector noch irgendjemand?") - @Test - void wireConnections() - { - // Nur ein Experiment, was über mehrere 'passive' Bausteine hinweg passieren würde - - Wire a = new Wire(t, 1, 2); - Wire b = new Wire(t, 1, 2); - Wire c = new Wire(t, 1, 2); - ReadWriteEnd aI = a.createReadWriteEnd(); - ReadWriteEnd bI = b.createReadWriteEnd(); - ReadWriteEnd cI = c.createReadWriteEnd(); - - TestBitDisplay test = new TestBitDisplay(t, c.createReadOnlyEnd()); - TestBitDisplay test2 = new TestBitDisplay(t, a.createReadOnlyEnd()); - LongConsumer print = time -> System.out.format("Time %2d\n a: %s\n b: %s\n c: %s\n", time, a, b, c); - - cI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - - cI.feedSignals(Bit.X); - test.assertAfterSimulationIs(print, Bit.X); - - cI.feedSignals(Bit.X); - cI.feedSignals(Bit.Z); - test.assertAfterSimulationIs(print, Bit.Z); - - new Connector(t, b.createReadWriteEnd(), c.createReadWriteEnd()).connect(); - test.assertAfterSimulationIs(print, Bit.Z); - System.err.println("ONE"); - bI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - System.err.println("ZERO"); - bI.feedSignals(Bit.ZERO); - test.assertAfterSimulationIs(print, Bit.ZERO); - System.err.println("Z"); - bI.feedSignals(Bit.Z); - test.assertAfterSimulationIs(print, Bit.Z); - - new Connector(t, a.createReadWriteEnd(), b.createReadWriteEnd()).connect(); - System.err.println("Z 2"); - aI.feedSignals(Bit.Z); - test.assertAfterSimulationIs(print, Bit.Z); - test2.assertAfterSimulationIs(Bit.Z); - System.err.println("ONE 2"); - aI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - test2.assertAfterSimulationIs(Bit.ONE); - System.err.println("ZERO 2"); - aI.feedSignals(Bit.ZERO); - test.assertAfterSimulationIs(print, Bit.ZERO); - test2.assertAfterSimulationIs(Bit.ZERO); - System.err.println("Z 2 II"); - aI.feedSignals(Bit.Z); - test.assertAfterSimulationIs(print, Bit.Z); - test2.assertAfterSimulationIs(Bit.Z); - - System.err.println("No Conflict yet"); - bI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - test2.assertAfterSimulationIs(Bit.ONE); - aI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - test2.assertAfterSimulationIs(Bit.ONE); - System.err.println("Conflict"); - aI.feedSignals(Bit.ZERO); - test.assertAfterSimulationIs(print, Bit.X); - test2.assertAfterSimulationIs(Bit.X); - aI.feedSignals(Bit.ONE); - test.assertAfterSimulationIs(print, Bit.ONE); - test2.assertAfterSimulationIs(Bit.ONE); - } - private static void assertBitArrayEquals(BitVector actual, Bit... expected) { assertArrayEquals(expected, actual.getBits()); -- 2.17.1