From 99767fcd36ffe9d9d25a3cf4fd9ee1a623285834 Mon Sep 17 00:00:00 2001
From: Daniel Kirschten <daniel.kirschten@gmx.de>
Date: Wed, 2 Oct 2019 19:05:04 +0200
Subject: [PATCH] CoreClock now starts as 1 to make Am2900Machine work again

---
 .../src/net/mograsim/logic/core/components/CoreClock.java       | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/plugins/net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreClock.java b/plugins/net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreClock.java
index 84608b4d..e186928b 100644
--- a/plugins/net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreClock.java
+++ b/plugins/net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreClock.java
@@ -17,7 +17,7 @@ import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
 public class CoreClock extends CoreComponent implements TimelineEventHandler, LogicObservable
 {
 	private Collection<LogicObserver> observers;
-	private boolean isOn = true;// first update switches to 0
+	private boolean isOn = false;// first update switches to 1; so the clock starts as 1.
 	private ReadWriteEnd out;
 	private int delta;
 
-- 
2.17.1