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ModelComponentToVerilogConverter can now convert TriStateBuffers
[Mograsim.git]
/
plugins
/
net.mograsim.logic.model.verilog
/
src
/
net
/
mograsim
/
logic
/
model
/
verilog
/
model
/
signals
/
drwxr-xr-x
..
-rw-r--r--
242
IOPort.java
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-rw-r--r--
290
Input.java
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294
Output.java
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-rw-r--r--
1552
Signal.java
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-rw-r--r--
278
Wire.java
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