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(parent: a8ba08b) | patch
CoreComponents now have a transport delay
authorFabian Stemmler <stemmler@in.tum.de>
Sun, 8 Sep 2019 14:21:39 +0000 (16:21 +0200)
committerFabian Stemmler <stemmler@in.tum.de>
Sun, 8 Sep 2019 14:21:39 +0000 (16:21 +0200)
commit62435458a06f909dc66eaac01c5b53e2dc4fa59f
tree7721ba088ef779f293273c4ef4c88fd200053afctree | snapshot
parenta8ba08b067b7c5e449656fca56ac067d5d701270commit | diff
CoreComponents now have a transport delay

There is now an issue with simultaneous signal changes, because the
generated events might not be executed in the order in which they are
created.
net.mograsim.logic.core/src/net/mograsim/logic/core/components/BasicCoreComponent.java diff | blob | history
net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreBitDisplay.java diff | blob | history
net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreDemux.java diff | blob | history
net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreMux.java diff | blob | history
net.mograsim.logic.core/src/net/mograsim/logic/core/components/CoreTriStateBuffer.java diff | blob | history
net.mograsim.logic.core/src/net/mograsim/logic/core/components/gates/CoreNotGate.java diff | blob | history
net.mograsim.logic.core/src/net/mograsim/logic/core/components/gates/MultiInputCoreGate.java diff | blob | history
net.mograsim.logic.core/test/net/mograsim/logic/core/tests/TestCoreBitDisplay.java diff | blob | history
net.mograsim.machine/src/net/mograsim/machine/standard/memory/WordAddressableMemoryComponent.java diff | blob | history
Mirror of https://github.com/Mograsim-Team/Mograsim