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(parent: 3873626) | patch
Handing through rst and clk signals (still very ugly)
authorDaniel Kirschten <daniel.kirschten@gmx.de>
Mon, 15 Mar 2021 15:38:48 +0000 (16:38 +0100)
committerDaniel Kirschten <daniel.kirschten@gmx.de>
Mon, 15 Mar 2021 15:38:52 +0000 (16:38 +0100)
commit253f4e92e8a8b644ef5fa2343adc3088954822ee
tree412f9a49f48af82d051dd0992efc3049cd1e9f67tree | snapshot
parent38736260ce55efa03e8abd5b1a13bece20172cb4commit | diff
Handing through rst and clk signals (still very ugly)
plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/VerilogComponentImplementation.java diff | blob | history
plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/statements/ComponentReference.java diff | blob | history
Mirror of https://github.com/Mograsim-Team/Mograsim