31e51fb79c63cdea231f75bbfc3d93c8e5ebf646
[Mograsim.git] / plugins / net.mograsim.logic.model.verilog / src / net / mograsim / logic / model / verilog / model / Wire.java
1 package net.mograsim.logic.model.verilog.model;
2
3 public class Wire extends NamedSignal
4 {
5         public Wire(String name, int width)
6         {
7                 super(Type.WIRE, name, width);
8         }
9
10         public String toDeclarationVerilogCode()
11         {
12                 return "wire [" + getWidth() + ":0] " + getName() + ";";
13         }
14 }