1 package net.mograsim.logic.model.verilog.examples;
3 import java.io.IOException;
4 import java.nio.file.Files;
5 import java.nio.file.Path;
6 import java.nio.file.Paths;
7 import java.util.Scanner;
9 import java.util.stream.Collectors;
10 import java.util.stream.Stream;
12 import com.google.gson.JsonElement;
14 import net.mograsim.logic.core.types.BitVector;
15 import net.mograsim.logic.model.am2900.Am2900Loader;
16 import net.mograsim.logic.model.am2900.components.ModelAm2900MPROM;
17 import net.mograsim.logic.model.am2900.components.ModelAm2900MainMemory;
18 import net.mograsim.logic.model.am2900.components.ModelAm2900MicroInstructionMemory;
19 import net.mograsim.logic.model.model.LogicModelModifiable;
20 import net.mograsim.logic.model.model.components.ModelComponent;
21 import net.mograsim.logic.model.model.components.Orientation;
22 import net.mograsim.logic.model.model.components.atomic.ModelBitDisplay;
23 import net.mograsim.logic.model.model.components.atomic.ModelClock;
24 import net.mograsim.logic.model.model.components.atomic.ModelClock.ModelClockParams;
25 import net.mograsim.logic.model.model.components.atomic.ModelFixedOutput;
26 import net.mograsim.logic.model.model.components.atomic.ModelNandGate;
27 import net.mograsim.logic.model.model.components.atomic.ModelTextComponent;
28 import net.mograsim.logic.model.model.components.atomic.ModelTriStateBuffer;
29 import net.mograsim.logic.model.model.components.atomic.ModelTriStateBuffer.ModelTriStateBufferParams;
30 import net.mograsim.logic.model.model.wires.ModelWireCrossPoint;
31 import net.mograsim.logic.model.serializing.IdentifyParams;
32 import net.mograsim.logic.model.serializing.IndirectModelComponentCreator;
33 import net.mograsim.logic.model.verilog.converter.ModelComponentToVerilogComponentDeclarationMapping;
34 import net.mograsim.logic.model.verilog.converter.ModelComponentToVerilogConverter;
35 import net.mograsim.logic.model.verilog.helper.UnionFind;
36 import net.mograsim.logic.model.verilog.model.IOPort;
37 import net.mograsim.logic.model.verilog.model.VerilogComponentDeclaration;
38 import net.mograsim.logic.model.verilog.model.VerilogComponentImplementation;
40 public class ExportAm2900
42 public static void main(String[] args) throws IOException
46 String rootComponentID;
47 try (Scanner sysin = new Scanner(System.in))
49 System.out.print("Directory to export Verilog into >");
50 target = Paths.get(sysin.nextLine());
51 if (!Files.exists(target))
52 Files.createDirectories(target);
53 else if (!Files.isDirectory(target))
54 throw new IllegalArgumentException("Target exists and is not a directory");
56 System.out.print("Component ID to serialize recursively >");
57 rootComponentID = sysin.nextLine();
60 if (!Files.exists(target))
61 Files.createDirectories(target);
62 else if (!Files.isDirectory(target))
63 throw new IllegalArgumentException("Target exists and is not a directory");
65 LogicModelModifiable model = new LogicModelModifiable();
67 Set<ModelComponentToVerilogComponentDeclarationMapping> atomicComponentMappings = Stream.of(//
68 new ModelNandGate(model, 1), //
69 new ModelFixedOutput(model, BitVector.SINGLE_0, null), //
70 new ModelFixedOutput(model, BitVector.SINGLE_1, null), //
71 new ModelTriStateBuffer(model, new ModelTriStateBufferParams(1, Orientation.RIGHT)), //
72 new ModelTriStateBuffer(model, new ModelTriStateBufferParams(1, Orientation.RIGHT_ALT)), //
73 new ModelTriStateBuffer(model, new ModelTriStateBufferParams(1, Orientation.DOWN)), //
74 new ModelTriStateBuffer(model, new ModelTriStateBufferParams(4, Orientation.RIGHT)), //
75 new ModelTriStateBuffer(model, new ModelTriStateBufferParams(12, Orientation.RIGHT_ALT)), //
76 new ModelTriStateBuffer(model, new ModelTriStateBufferParams(12, Orientation.DOWN)), //
77 new ModelTriStateBuffer(model, new ModelTriStateBufferParams(16, Orientation.LEFT)), //
78 new ModelTriStateBuffer(model, new ModelTriStateBufferParams(16, Orientation.RIGHT_ALT)), //
79 new ModelWireCrossPoint(model, 1), //
80 new ModelWireCrossPoint(model, 2), //
81 new ModelWireCrossPoint(model, 4), //
82 new ModelWireCrossPoint(model, 9), //
83 new ModelWireCrossPoint(model, 12), //
84 new ModelWireCrossPoint(model, 16), //
85 new ModelClock(model, new ModelClockParams(7000, Orientation.RIGHT)), //
86 new ModelTextComponent(model, "A bus"), //
87 new ModelTextComponent(model, "MPM addr"), //
88 new ModelTextComponent(model, "D bus"), //
89 new ModelAm2900MainMemory(model, null), //
90 new ModelAm2900MPROM(model, null), //
91 new ModelAm2900MicroInstructionMemory(model, null), //
92 new ModelBitDisplay(model, 12), //
93 new ModelBitDisplay(model, 16)//
96 String id = c.getIDForSerializing(new IdentifyParams());
97 JsonElement params = c.getParamsForSerializingJSON(new IdentifyParams());
98 ModelComponentToVerilogComponentDeclarationMapping generateCanonicalDeclarationMapping = ModelComponentToVerilogConverter
99 .generateCanonicalDeclarationMapping(c, new UnionFind<>(), id, params,
100 ModelComponentToVerilogConverter.sanitizeVerilogID("mgs_" + id + (params.isJsonNull() ? "" : "_" + params)));
101 VerilogComponentDeclaration d = generateCanonicalDeclarationMapping.getVerilogComponentDeclaration();
102 System.out.println("module " + d.getID() + " "
103 + d.getIOPorts().stream().map(IOPort::toDeclarationVerilogCode).collect(Collectors.joining(", ", "(", ")")) + ";");
104 return generateCanonicalDeclarationMapping;
105 }).collect(Collectors.toSet());
107 ModelComponent root = IndirectModelComponentCreator.createComponent(model, rootComponentID);
108 Set<VerilogComponentImplementation> convertResult = ModelComponentToVerilogConverter.convert(atomicComponentMappings, Set.of(root),
110 for (VerilogComponentImplementation convertedComponent : convertResult)
111 Files.writeString(target.resolve(convertedComponent.getDeclaration().getID() + ".v"), convertedComponent.toVerilogCode());