package net.mograsim.logic.model.am2900.components;
-import net.mograsim.logic.model.am2900.machine.Am2900Machine;
-import net.mograsim.logic.model.am2900.machine.Am2900MachineDefinition;
+import net.mograsim.logic.model.am2900.machine.Am2900MainMemoryDefinition;
import net.mograsim.logic.model.model.LogicModelModifiable;
-import net.mograsim.logic.model.modeladapter.LogicCoreAdapter;
import net.mograsim.logic.model.serializing.IdentifyParams;
import net.mograsim.logic.model.serializing.IndirectModelComponentCreator;
import net.mograsim.machine.standard.memory.ModelWordAddressableMemory;
-public class ModelAm2900MainMemory extends ModelWordAddressableMemory<Am2900Machine>
+public class ModelAm2900MainMemory extends ModelWordAddressableMemory
{
public ModelAm2900MainMemory(LogicModelModifiable model, String name)
{
- super(model, Am2900MachineDefinition.getInstance().getMainMemoryDefinition(), name);
+ super(model, Am2900MainMemoryDefinition.instance, name);
}
@Override
static
{
- LogicCoreAdapter.addComponentAdapter(new ModelAm2900MainMemoryAdapter());
IndirectModelComponentCreator.setComponentSupplier(ModelAm2900MainMemory.class.getCanonicalName(), (m, p, n) ->
{
return new ModelAm2900MainMemory(m, n);
+++ /dev/null
-package net.mograsim.logic.model.am2900.components;
-
-import java.util.Map;
-
-import net.mograsim.logic.core.timeline.Timeline;
-import net.mograsim.logic.core.wires.CoreWire;
-import net.mograsim.logic.core.wires.CoreWire.ReadEnd;
-import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
-import net.mograsim.logic.model.model.wires.Pin;
-import net.mograsim.logic.model.modeladapter.CoreModelParameters;
-import net.mograsim.logic.model.modeladapter.componentadapters.ComponentAdapter;
-import net.mograsim.machine.standard.memory.CoreWordAddressableMemory;
-
-public class ModelAm2900MainMemoryAdapter implements ComponentAdapter<ModelAm2900MainMemory>
-{
-
- @Override
- public Class<ModelAm2900MainMemory> getSupportedClass()
- {
- return ModelAm2900MainMemory.class;
- }
-
- @Override
- public void createAndLinkComponent(Timeline timeline, CoreModelParameters params, ModelAm2900MainMemory modelComponent,
- Map<Pin, CoreWire> logicWiresPerPin)
- {
- ReadWriteEnd data = logicWiresPerPin.get(modelComponent.getDataPin()).createReadWriteEnd();
- ReadEnd address = logicWiresPerPin.get(modelComponent.getAddressPin()).createReadOnlyEnd();
- ReadEnd mode = logicWiresPerPin.get(modelComponent.getReadWritePin()).createReadOnlyEnd();
- CoreWordAddressableMemory mem = new CoreWordAddressableMemory(timeline, 2, modelComponent.getMachine().getMainMemory(), data, mode,
- address);
- modelComponent.setCoreModelBinding(mem);
- }
-}
package net.mograsim.logic.model.am2900.components;
-import net.mograsim.logic.model.am2900.machine.Am2900Machine;
-import net.mograsim.logic.model.am2900.machine.Am2900MachineDefinition;
+import net.mograsim.logic.model.am2900.machine.Am2900MicroInstructionMemoryDefinition;
import net.mograsim.logic.model.model.LogicModelModifiable;
-import net.mograsim.logic.model.modeladapter.LogicCoreAdapter;
import net.mograsim.logic.model.serializing.IdentifyParams;
import net.mograsim.logic.model.serializing.IndirectModelComponentCreator;
import net.mograsim.machine.mi.components.ModelMicroInstructionMemory;
-public class ModelAm2900MicroInstructionMemory extends ModelMicroInstructionMemory<Am2900Machine>
+public class ModelAm2900MicroInstructionMemory extends ModelMicroInstructionMemory
{
public ModelAm2900MicroInstructionMemory(LogicModelModifiable model, String name)
{
- super(model, Am2900MachineDefinition.getInstance().getMicroInstructionMemoryDefinition(), name);
+ super(model, Am2900MicroInstructionMemoryDefinition.instance, name);
+ }
+
+ @Override
+ public String getIDForSerializing(IdentifyParams idParams)
+ {
+ return "Am2900MicroInstructionMemory";
}
static
{
- LogicCoreAdapter.addComponentAdapter(new ModelAm2900MicroInstructionMemoryAdapter());
IndirectModelComponentCreator.setComponentSupplier(ModelAm2900MicroInstructionMemory.class.getCanonicalName(), (m, p, n) ->
{
return new ModelAm2900MicroInstructionMemory(m, n);
});
}
-
- @Override
- public String getIDForSerializing(IdentifyParams idParams)
- {
- return "Am2900MicroInstructionMemory";
- }
-}
+}
\ No newline at end of file
+++ /dev/null
-package net.mograsim.logic.model.am2900.components;
-
-import java.util.Map;
-
-import net.mograsim.logic.core.timeline.Timeline;
-import net.mograsim.logic.core.wires.CoreWire;
-import net.mograsim.logic.core.wires.CoreWire.ReadEnd;
-import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
-import net.mograsim.logic.model.model.wires.Pin;
-import net.mograsim.logic.model.modeladapter.CoreModelParameters;
-import net.mograsim.logic.model.modeladapter.componentadapters.ComponentAdapter;
-import net.mograsim.machine.mi.components.CoreMicroInstructionMemory;
-
-public class ModelAm2900MicroInstructionMemoryAdapter implements ComponentAdapter<ModelAm2900MicroInstructionMemory>
-{
-
- @Override
- public Class<ModelAm2900MicroInstructionMemory> getSupportedClass()
- {
- return ModelAm2900MicroInstructionMemory.class;
- }
-
- @Override
- public void createAndLinkComponent(Timeline timeline, CoreModelParameters params, ModelAm2900MicroInstructionMemory modelComponent,
- Map<Pin, CoreWire> logicWiresPerPin)
- {
- ReadWriteEnd data = logicWiresPerPin.get(modelComponent.getDataPin()).createReadWriteEnd();
- ReadEnd address = logicWiresPerPin.get(modelComponent.getAddressPin()).createReadOnlyEnd();
- CoreMicroInstructionMemory mem = new CoreMicroInstructionMemory(timeline, 2,
- modelComponent.getMachine().getMicroInstructionMemory(), data, address);
- modelComponent.setCoreModelBinding(mem);
- }
-
-}
import net.mograsim.logic.core.timeline.Timeline;
import net.mograsim.logic.core.types.Bit;
import net.mograsim.logic.core.types.BitVector;
-import net.mograsim.logic.model.am2900.components.ModelAm2900MainMemory;
-import net.mograsim.logic.model.am2900.components.ModelAm2900MicroInstructionMemory;
import net.mograsim.logic.model.model.LogicModel;
import net.mograsim.logic.model.model.LogicModelModifiable;
import net.mograsim.logic.model.model.components.ModelComponent;
mainMemory = new WordAddressableMemory(am2900MachineDefinition.getMainMemoryDefinition());
instMemory = new AssignableMicroInstructionMemory(
new StandardMicroInstructionMemory(am2900MachineDefinition.getMicroInstructionMemoryDefinition()));
- logicModel.getComponentBySubmodelPath("Am2900.Am2900MainMemory#0", ModelAm2900MainMemory.class).setMachine(this);
- logicModel.getComponentBySubmodelPath("Am2900.Am2900MicroInstructionMemory#0", ModelAm2900MicroInstructionMemory.class)
- .setMachine(this);
timeline = LogicCoreAdapter.convert(logicModel, params);
+ am2900.setHighLevelState("ram.memory_binding", mainMemory);
+ am2900.setHighLevelState("mpm.memory_binding", instMemory);
}
@Override
package net.mograsim.logic.model.am2900.machine;
-import java.util.Objects;
import java.util.Set;
import net.mograsim.logic.model.model.LogicModelModifiable;
import net.mograsim.machine.ISASchema;
import net.mograsim.machine.MachineDefinition;
-import net.mograsim.machine.MachineRegistry;
import net.mograsim.machine.Register;
+//we can't use the Singleton pattern here because a MachineDefinition needs a public parameterless constructor
+//(used for detecting installed machines in plugin.core)
public class Am2900MachineDefinition implements MachineDefinition
{
- private Am2900MainMemoryDefinition memoryDefinition = new Am2900MainMemoryDefinition();
- private Am2900MicroInstructionMemoryDefinition microInstMemoryDefinition = new Am2900MicroInstructionMemoryDefinition();
- private final static Am2900MachineDefinition instance = new Am2900MachineDefinition();
-
- public static Am2900MachineDefinition getInstance()
- {
- return Objects.requireNonNullElseGet((Am2900MachineDefinition) MachineRegistry.getinstalledMachines().get("Am2900"),
- () -> instance);
- }
-
@Override
public Am2900Machine createNew()
{
@Override
public Am2900MainMemoryDefinition getMainMemoryDefinition()
{
- return memoryDefinition;
+ return Am2900MainMemoryDefinition.instance;
+ }
+
+ @Override
+ public int hashCode()
+ {
+ return 12345;
+ }
+
+ @Override
+ public boolean equals(Object obj)
+ {
+ return obj != null && obj instanceof Am2900MachineDefinition;
}
@Override
public Am2900MicroInstructionMemoryDefinition getMicroInstructionMemoryDefinition()
{
- return microInstMemoryDefinition;
+ return Am2900MicroInstructionMemoryDefinition.instance;
}
}
public class Am2900MainMemoryDefinition implements MainMemoryDefinition
{
+ public static final Am2900MainMemoryDefinition instance = new Am2900MainMemoryDefinition();
@Override
public int getMemoryAddressBits()
return 16;
}
-}
+ private Am2900MainMemoryDefinition()
+ {
+ }
+}
\ No newline at end of file
public class Am2900MicroInstructionDefinition implements MicroInstructionDefinition
{
+ public static final Am2900MicroInstructionDefinition instance = new Am2900MicroInstructionDefinition();
+
private static final BooleanClassification interruptEnable = new BooleanClassification(false, "IE", "Dis");
// not implemented, because not documented.
private static final MnemonicFamily interruptInstructions = new MnemonicFamily("X", new MnemonicPair("X", BitVector.of(Bit.ZERO, 4)));
System.out.print(Arrays.stream(s.split(", new")).reduce((a, b) -> b + ", new" + a));
// System.out.println(Arrays.stream(paramDesc).reduce("", (a, b) -> String.format("\"%s\", %s", b, a)));
}
+
+ private Am2900MicroInstructionDefinition()
+ {
+ }
}
public class Am2900MicroInstructionMemoryDefinition implements MicroInstructionMemoryDefinition
{
+ public static final Am2900MicroInstructionMemoryDefinition instance = new Am2900MicroInstructionMemoryDefinition();
@Override
public int getMemoryAddressBits()
@Override
public MicroInstructionDefinition getMicroInstructionDefinition()
{
- return new Am2900MicroInstructionDefinition();
+ return Am2900MicroInstructionDefinition.instance;
}
-}
+
+ private Am2900MicroInstructionMemoryDefinition()
+ {
+ }
+}
\ No newline at end of file
import net.mograsim.logic.model.snippets.symbolrenderers.SimpleRectangularLikeSymbolRenderer;
import net.mograsim.logic.model.snippets.symbolrenderers.SimpleRectangularLikeSymbolRenderer.SimpleRectangularLikeParams;
-public abstract class ModelMemory<M extends Machine> extends ModelComponent
+public abstract class ModelMemory extends ModelComponent
{
private Renderer symbolRenderer;
private Renderer outlineRenderer;
- private M machine;
protected ModelMemory(LogicModelModifiable model, int width, int height, String name, String centerText, boolean callInit)
{
symbolRenderer.render(gc, visibleRegion);
outlineRenderer.render(gc, visibleRegion);
}
-
- public void setMachine(M machine)
- {
- this.machine = machine;
- }
-
- public M getMachine()
- {
- return machine;
- }
-}
+}
\ No newline at end of file
import net.mograsim.logic.core.types.BitVector;
import net.mograsim.logic.core.wires.CoreWire.ReadEnd;
import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
+import net.mograsim.machine.MemoryObserver;
import net.mograsim.machine.mi.MicroInstructionMemory;
+import net.mograsim.machine.mi.MicroInstructionMemoryDefinition;
public class CoreMicroInstructionMemory extends BasicCoreComponent
{
private final ReadWriteEnd data;
private final ReadEnd address;
- private final MicroInstructionMemory memory;
+ private final MicroInstructionMemoryDefinition definition;
+ private final MemoryObserver memObs;
+ private MicroInstructionMemory memory;
- public CoreMicroInstructionMemory(Timeline timeline, int processTime, MicroInstructionMemory memory, ReadWriteEnd data, ReadEnd address)
+ public CoreMicroInstructionMemory(Timeline timeline, int processTime, MicroInstructionMemoryDefinition definition, ReadWriteEnd data,
+ ReadEnd address)
{
super(timeline, processTime);
- this.memory = memory;
+ if (data.width() != definition.getMicroInstructionDefinition().sizeInBits())
+ throw new IllegalArgumentException(
+ String.format("Bit width of data wire does not match microinstruction memory definition. Expected: %d Actual: %d",
+ definition.getMicroInstructionDefinition().sizeInBits(), data.width()));
+ if (address.width() != definition.getMemoryAddressBits())
+ throw new IllegalArgumentException(
+ String.format("Bit width of address wire does not match microinstruction memory definition. Expected: %d Actual: %d",
+ definition.getMemoryAddressBits(), address.width()));
+
this.data = data;
this.address = address;
- memory.registerObserver(a -> update());
+ this.definition = definition;
+ this.memObs = a -> update();
address.registerObserver(this);
}
+ public void setMemory(MicroInstructionMemory memory)
+ {
+ if (memory != null && !memory.getDefinition().equals(definition))
+ throw new IllegalArgumentException("Memory of incorrect memory definition given");
+ if (this.memory != null)
+ this.memory.registerObserver(memObs);
+ this.memory = memory;
+ if (memory != null)
+ memory.registerObserver(memObs);
+ update();
+ }
+
public MicroInstructionMemory getMemory()
{
return memory;
@Override
protected TimelineEventHandler compute()
{
- if (!address.getValues().isBinary())
- {
+ if (memory == null || !address.getValues().isBinary())
return e -> data.feedSignals(Bit.U.toVector(data.width()));// TODO don't always feed U, but decide to feed X or U.
- }
long addressed = address.getValues().getUnsignedValueLong();
BitVector storedData = memory.getCell(addressed).toBitVector();
return e -> data.feedSignals(storedData);
}
-}
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.machine.mi.components;
+
+import java.util.Map;
+
+import net.mograsim.logic.core.timeline.Timeline;
+import net.mograsim.logic.core.wires.CoreWire;
+import net.mograsim.logic.core.wires.CoreWire.ReadEnd;
+import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
+import net.mograsim.logic.model.model.wires.Pin;
+import net.mograsim.logic.model.modeladapter.CoreModelParameters;
+import net.mograsim.logic.model.modeladapter.componentadapters.ComponentAdapter;
+
+public class MicroInstructionMemoryAdapter implements ComponentAdapter<ModelMicroInstructionMemory>
+{
+ @Override
+ public Class<ModelMicroInstructionMemory> getSupportedClass()
+ {
+ return ModelMicroInstructionMemory.class;
+ }
+
+ @Override
+ public void createAndLinkComponent(Timeline timeline, CoreModelParameters params, ModelMicroInstructionMemory modelComponent,
+ Map<Pin, CoreWire> logicWiresPerPin)
+ {
+ ReadWriteEnd data = logicWiresPerPin.get(modelComponent.getDataPin()).createReadWriteEnd();
+ ReadEnd address = logicWiresPerPin.get(modelComponent.getAddressPin()).createReadOnlyEnd();
+ CoreMicroInstructionMemory mem = new CoreMicroInstructionMemory(timeline, 2, modelComponent.getDefinition(), data, address);
+ modelComponent.setCoreModelBinding(mem);
+ }
+}
\ No newline at end of file
import net.mograsim.logic.model.model.LogicModelModifiable;
import net.mograsim.logic.model.model.wires.Pin;
import net.mograsim.logic.model.model.wires.PinUsage;
-import net.mograsim.machine.Machine;
+import net.mograsim.logic.model.modeladapter.LogicCoreAdapter;
import net.mograsim.machine.ModelMemory;
+import net.mograsim.machine.mi.MicroInstructionMemory;
import net.mograsim.machine.mi.MicroInstructionMemoryDefinition;
-public abstract class ModelMicroInstructionMemory<M extends Machine> extends ModelMemory<M>
+public abstract class ModelMicroInstructionMemory extends ModelMemory
{
private final Pin addrPin, dataPin;
private CoreMicroInstructionMemory memory;
{
this.memory = memory;
}
-}
+
+ @Override
+ public void setHighLevelState(String stateID, Object newState)
+ {
+ if (stateID.equals("memory_binding"))
+ memory.setMemory((MicroInstructionMemory) newState);
+ else
+ super.setHighLevelState(stateID, newState);
+ }
+
+ @Override
+ public Object getHighLevelState(String stateID)
+ {
+ if (stateID.equals("memory_binding"))
+ return memory.getMemory();
+ return super.getHighLevelState(stateID);
+ }
+
+ static
+ {
+ LogicCoreAdapter.addComponentAdapter(new MicroInstructionMemoryAdapter());
+ }
+}
\ No newline at end of file
import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
import net.mograsim.machine.MainMemory;
import net.mograsim.machine.MainMemoryDefinition;
+import net.mograsim.machine.MemoryObserver;
/**
* A memory component that only allows access to words of a specific width
*/
public class CoreWordAddressableMemory extends BasicCoreComponent
{
- private final MainMemory memory;
private final static Bit read = Bit.ONE;
private ReadWriteEnd data;
private ReadEnd rWBit, address;
+ private final MemoryObserver memObs;
+ private final MainMemoryDefinition definition;
+ private MainMemory memory;
/**
* @param data The bits of this ReadEnd are the value that is written to/read from memory; The bit width of this wire is the width of
* @param rWBit The value of the 0th bit dictates the mode: 0: Write, 1: Read
* @param address The bits of this ReadEnd address the memory cell to read/write
*/
- public CoreWordAddressableMemory(Timeline timeline, int processTime, MainMemory memory, ReadWriteEnd data, ReadEnd rWBit,
+ public CoreWordAddressableMemory(Timeline timeline, int processTime, MainMemoryDefinition definition, ReadWriteEnd data, ReadEnd rWBit,
ReadEnd address)
{
super(timeline, processTime);
- MainMemoryDefinition definition = memory.getDefinition();
if (data.width() != definition.getCellWidth())
throw new IllegalArgumentException(
String.format("Bit width of data wire does not match main memory definition. Expected: %d Actual: %d",
throw new IllegalArgumentException(
String.format("Bit width of address wire does not match main memory definition. Expected: %d Actual: %d",
definition.getMemoryAddressBits(), address.width()));
- this.memory = memory;
this.data = data;
this.rWBit = rWBit;
this.address = address;
- memory.registerObserver(a -> update());
+ this.definition = definition;
+ this.memObs = a -> update();
data.registerObserver(this);
rWBit.registerObserver(this);
address.registerObserver(this);
}
+ public void setMemory(MainMemory memory)
+ {
+ if (memory != null && !memory.getDefinition().equals(definition))
+ throw new IllegalArgumentException("Memory of incorrect memory definition given");
+ if (this.memory != null)
+ this.memory.registerObserver(memObs);
+ this.memory = memory;
+ if (memory != null)
+ memory.registerObserver(memObs);
+ update();
+ }
+
+ public MainMemory getMemory()
+ {
+ return memory;
+ }
+
@Override
protected TimelineEventHandler compute()
{
+ if (memory == null)
+ return e -> data.feedSignals(Bit.U.toVector(data.width()));
if (!address.getValues().isBinary())
{
if (read.equals(rWBit.getValue()))
import net.mograsim.logic.model.model.LogicModelModifiable;
import net.mograsim.logic.model.model.wires.Pin;
import net.mograsim.logic.model.model.wires.PinUsage;
-import net.mograsim.machine.Machine;
+import net.mograsim.logic.model.modeladapter.LogicCoreAdapter;
+import net.mograsim.machine.MainMemory;
import net.mograsim.machine.MainMemoryDefinition;
import net.mograsim.machine.ModelMemory;
-public abstract class ModelWordAddressableMemory<M extends Machine> extends ModelMemory<M>
+public abstract class ModelWordAddressableMemory extends ModelMemory
{
private final Pin addrPin, dataPin, rWPin;
private CoreWordAddressableMemory memory;
{
return memory;
}
-}
+
+ @Override
+ public void setHighLevelState(String stateID, Object newState)
+ {
+ if (stateID.equals("memory_binding"))
+ memory.setMemory((MainMemory) newState);
+ else
+ super.setHighLevelState(stateID, newState);
+ }
+
+ @Override
+ public Object getHighLevelState(String stateID)
+ {
+ if (stateID.equals("memory_binding"))
+ return memory.getMemory();
+ return super.getHighLevelState(stateID);
+ }
+
+ static
+ {
+ LogicCoreAdapter.addComponentAdapter(new WordAddressableMemoryAdapter());
+ }
+}
\ No newline at end of file
--- /dev/null
+package net.mograsim.machine.standard.memory;
+
+import java.util.Map;
+
+import net.mograsim.logic.core.timeline.Timeline;
+import net.mograsim.logic.core.wires.CoreWire;
+import net.mograsim.logic.core.wires.CoreWire.ReadEnd;
+import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
+import net.mograsim.logic.model.model.wires.Pin;
+import net.mograsim.logic.model.modeladapter.CoreModelParameters;
+import net.mograsim.logic.model.modeladapter.componentadapters.ComponentAdapter;
+
+public class WordAddressableMemoryAdapter implements ComponentAdapter<ModelWordAddressableMemory>
+{
+ @Override
+ public Class<ModelWordAddressableMemory> getSupportedClass()
+ {
+ return ModelWordAddressableMemory.class;
+ }
+
+ @Override
+ public void createAndLinkComponent(Timeline timeline, CoreModelParameters params, ModelWordAddressableMemory modelComponent,
+ Map<Pin, CoreWire> logicWiresPerPin)
+ {
+ ReadWriteEnd data = logicWiresPerPin.get(modelComponent.getDataPin()).createReadWriteEnd();
+ ReadEnd address = logicWiresPerPin.get(modelComponent.getAddressPin()).createReadOnlyEnd();
+ ReadEnd mode = logicWiresPerPin.get(modelComponent.getReadWritePin()).createReadOnlyEnd();
+ CoreWordAddressableMemory mem = new CoreWordAddressableMemory(timeline, 2, modelComponent.getDefinition(), data, mode, address);
+ modelComponent.setCoreModelBinding(mem);
+ }
+}
\ No newline at end of file
ReadWriteEnd dataI = data.createReadWriteEnd();
ReadWriteEnd addressI = address.createReadWriteEnd();
- @SuppressWarnings("unused")
- CoreWordAddressableMemory memory = new CoreWordAddressableMemory(t, 4,
- new WordAddressableMemory(MainMemoryDefinition.create(64, 16, 4096L, Long.MAX_VALUE)), data.createReadWriteEnd(),
+ MainMemoryDefinition definition = MainMemoryDefinition.create(64, 16, 4096L, Long.MAX_VALUE);
+ CoreWordAddressableMemory memory = new CoreWordAddressableMemory(t, 4, definition, data.createReadWriteEnd(),
rW.createReadOnlyEnd(), address.createReadOnlyEnd());
+ memory.setMemory(new WordAddressableMemory(definition));
Random r = new Random(seed);
for (long j = 1; j > 0; j *= 2)
projects / Mograsim.git / commitdiff