--- /dev/null
+{
+ "width": 50.0,
+ "height": 45.0,
+ "interfacePins": [
+ {
+ "location": {
+ "x": 10.0,
+ "y": 0.0
+ },
+ "name": "I1",
+ "logicWidth": 1,
+ "usage": "INPUT"
+ },
+ {
+ "location": {
+ "x": 20.0,
+ "y": 0.0
+ },
+ "name": "I2",
+ "logicWidth": 1,
+ "usage": "INPUT"
+ },
+ {
+ "location": {
+ "x": 30.0,
+ "y": 0.0
+ },
+ "name": "I3",
+ "logicWidth": 1,
+ "usage": "INPUT"
+ },
+ {
+ "location": {
+ "x": 40.0,
+ "y": 0.0
+ },
+ "name": "I4",
+ "logicWidth": 1,
+ "usage": "INPUT"
+ },
+ {
+ "location": {
+ "x": 0.0,
+ "y": 10.0
+ },
+ "name": "S1",
+ "logicWidth": 1,
+ "usage": "INPUT"
+ },
+ {
+ "location": {
+ "x": 0.0,
+ "y": 20.0
+ },
+ "name": "S2",
+ "logicWidth": 1,
+ "usage": "INPUT"
+ },
+ {
+ "location": {
+ "x": 0.0,
+ "y": 30.0
+ },
+ "name": "S3",
+ "logicWidth": 1,
+ "usage": "INPUT"
+ },
+ {
+ "location": {
+ "x": 0.0,
+ "y": 40.0
+ },
+ "name": "S4",
+ "logicWidth": 1,
+ "usage": "INPUT"
+ },
+ {
+ "location": {
+ "x": 50.0,
+ "y": 20.0
+ },
+ "name": "Y",
+ "logicWidth": 1,
+ "usage": "OUTPUT"
+ }
+ ],
+ "innerScale": 0.4,
+ "submodel": {
+ "components": [
+ {
+ "id": "NandGate",
+ "name": "NandGate#0",
+ "pos": {
+ "x": 100.0,
+ "y": 40.0
+ },
+ "params": 1
+ },
+ {
+ "id": "NandGate",
+ "name": "NandGate#1",
+ "pos": {
+ "x": 75.0,
+ "y": 60.0
+ },
+ "params": 1
+ },
+ {
+ "id": "NandGate",
+ "name": "NandGate#2",
+ "pos": {
+ "x": 75.0,
+ "y": 25.0
+ },
+ "params": 1
+ },
+ {
+ "id": "WireCrossPoint",
+ "name": "WireCrossPoint#0",
+ "pos": {
+ "x": 69.0,
+ "y": 29.0
+ },
+ "params": 1
+ },
+ {
+ "id": "WireCrossPoint",
+ "name": "WireCrossPoint#1",
+ "pos": {
+ "x": 69.0,
+ "y": 74.0
+ },
+ "params": 1
+ },
+ {
+ "id": "sel1",
+ "name": "sel1#0",
+ "pos": {
+ "x": 30.0,
+ "y": 25.0
+ }
+ },
+ {
+ "id": "sel1",
+ "name": "sel1#1",
+ "pos": {
+ "x": 30.0,
+ "y": 70.0
+ }
+ }
+ ],
+ "wires": [
+ {
+ "pin1": {
+ "compName": "sel1#0",
+ "pinName": "Y"
+ },
+ "pin2": {
+ "compName": "WireCrossPoint#0",
+ "pinName": ""
+ },
+ "name": "unnamedWire#0",
+ "path": []
+ },
+ {
+ "pin1": {
+ "compName": "WireCrossPoint#0",
+ "pinName": ""
+ },
+ "pin2": {
+ "compName": "NandGate#2",
+ "pinName": "A"
+ },
+ "name": "unnamedWire#1",
+ "path": []
+ },
+ {
+ "pin1": {
+ "compName": "WireCrossPoint#0",
+ "pinName": ""
+ },
+ "pin2": {
+ "compName": "NandGate#2",
+ "pinName": "B"
+ },
+ "name": "unnamedWire#2",
+ "path": [
+ {
+ "x": 70.0,
+ "y": 40.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "sel1#1",
+ "pinName": "Y"
+ },
+ "pin2": {
+ "compName": "WireCrossPoint#1",
+ "pinName": ""
+ },
+ "name": "unnamedWire#3",
+ "path": []
+ },
+ {
+ "pin1": {
+ "compName": "WireCrossPoint#1",
+ "pinName": ""
+ },
+ "pin2": {
+ "compName": "NandGate#1",
+ "pinName": "A"
+ },
+ "name": "unnamedWire#4",
+ "path": [
+ {
+ "x": 70.0,
+ "y": 65.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "WireCrossPoint#1",
+ "pinName": ""
+ },
+ "pin2": {
+ "compName": "NandGate#1",
+ "pinName": "B"
+ },
+ "name": "unnamedWire#5",
+ "path": []
+ },
+ {
+ "pin1": {
+ "compName": "NandGate#2",
+ "pinName": "Y"
+ },
+ "pin2": {
+ "compName": "NandGate#0",
+ "pinName": "A"
+ },
+ "name": "unnamedWire#6",
+ "path": [
+ {
+ "x": 97.5,
+ "y": 35.0
+ },
+ {
+ "x": 97.5,
+ "y": 45.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "NandGate#0",
+ "pinName": "B"
+ },
+ "pin2": {
+ "compName": "NandGate#1",
+ "pinName": "Y"
+ },
+ "name": "unnamedWire#7",
+ "path": [
+ {
+ "x": 97.5,
+ "y": 55.0
+ },
+ {
+ "x": 97.5,
+ "y": 70.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "_submodelinterface",
+ "pinName": "S1"
+ },
+ "pin2": {
+ "compName": "sel1#0",
+ "pinName": "S1"
+ },
+ "name": "unnamedWire#8",
+ "path": [
+ {
+ "x": 5.0,
+ "y": 25.0
+ },
+ {
+ "x": 5.0,
+ "y": 30.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "_submodelinterface",
+ "pinName": "S2"
+ },
+ "pin2": {
+ "compName": "sel1#0",
+ "pinName": "S2"
+ },
+ "name": "unnamedWire#9",
+ "path": [
+ {
+ "x": 5.0,
+ "y": 50.0
+ },
+ {
+ "x": 5.0,
+ "y": 40.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "_submodelinterface",
+ "pinName": "S3"
+ },
+ "pin2": {
+ "compName": "sel1#1",
+ "pinName": "S1"
+ },
+ "name": "unnamedWire#10",
+ "path": []
+ },
+ {
+ "pin1": {
+ "compName": "_submodelinterface",
+ "pinName": "S4"
+ },
+ "pin2": {
+ "compName": "sel1#1",
+ "pinName": "S2"
+ },
+ "name": "unnamedWire#11",
+ "path": [
+ {
+ "x": 5.0,
+ "y": 100.0
+ },
+ {
+ "x": 5.0,
+ "y": 85.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "_submodelinterface",
+ "pinName": "I4"
+ },
+ "pin2": {
+ "compName": "sel1#1",
+ "pinName": "I2"
+ },
+ "name": "unnamedWire#12",
+ "path": [
+ {
+ "x": 100.0,
+ "y": 20.0
+ },
+ {
+ "x": 25.0,
+ "y": 20.0
+ },
+ {
+ "x": 25.0,
+ "y": 105.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "_submodelinterface",
+ "pinName": "I3"
+ },
+ "pin2": {
+ "compName": "sel1#1",
+ "pinName": "I1"
+ },
+ "name": "unnamedWire#13",
+ "path": [
+ {
+ "x": 75.0,
+ "y": 15.0
+ },
+ {
+ "x": 20.0,
+ "y": 15.0
+ },
+ {
+ "x": 20.0,
+ "y": 95.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "_submodelinterface",
+ "pinName": "I2"
+ },
+ "pin2": {
+ "compName": "sel1#0",
+ "pinName": "I2"
+ },
+ "name": "unnamedWire#14",
+ "path": [
+ {
+ "x": 50.0,
+ "y": 10.0
+ },
+ {
+ "x": 15.0,
+ "y": 10.0
+ },
+ {
+ "x": 15.0,
+ "y": 60.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "_submodelinterface",
+ "pinName": "I1"
+ },
+ "pin2": {
+ "compName": "sel1#0",
+ "pinName": "I1"
+ },
+ "name": "unnamedWire#15",
+ "path": [
+ {
+ "x": 25.0,
+ "y": 5.0
+ },
+ {
+ "x": 10.0,
+ "y": 5.0
+ },
+ {
+ "x": 10.0,
+ "y": 50.0
+ }
+ ]
+ },
+ {
+ "pin1": {
+ "compName": "NandGate#0",
+ "pinName": "Y"
+ },
+ "pin2": {
+ "compName": "_submodelinterface",
+ "pinName": "Y"
+ },
+ "name": "unnamedWire#16",
+ "path": []
+ }
+ ],
+ "version": "0.1.1"
+ },
+ "symbolRendererSnippetID": "simpleRectangularLike",
+ "symbolRendererParams": {
+ "centerText": "sel4",
+ "centerTextHeight": 5.0,
+ "horizontalComponentCenter": 25.0,
+ "pinLabelHeight": 3.5,
+ "pinLabelMargin": 0.5
+ },
+ "outlineRendererSnippetID": "default",
+ "highLevelStateHandlerSnippetID": "default",
+ "version": "0.1.5"
+}
\ No newline at end of file
import net.mograsim.logic.model.SimpleLogicUIStandalone;
import net.mograsim.logic.model.am2900.Am2900Loader;
-import net.mograsim.logic.model.am2900.machine.StrictAm2900MachineDefinition;
import net.mograsim.logic.model.model.LogicModelModifiable;
import net.mograsim.logic.model.model.components.ModelComponent;
import net.mograsim.logic.model.model.components.atomic.ModelBitDisplay;
import net.mograsim.logic.model.model.wires.ModelWire;
import net.mograsim.logic.model.model.wires.Pin;
import net.mograsim.logic.model.model.wires.PinUsage;
+import net.mograsim.logic.model.serializing.IndirectModelComponentCreator;
public class ModelComponentTestbench
{
public static void createTestbench(LogicModelModifiable model)
{
Am2900Loader.setup();
- ModelComponent comp = new StrictAm2900MachineDefinition().createNew(model).getAm2900();
-// ModelComponent comp = IndirectModelComponentCreator.createComponent(model, "inc12");
+// ModelComponent comp = new StrictAm2900MachineDefinition().createNew(model).getAm2900();
+ ModelComponent comp = IndirectModelComponentCreator.createComponent(model, "sel4");
List<String> inputPinNames = new ArrayList<>();
List<String> outputPinNames = new ArrayList<>();