1 package era.mi.logic.components.gates;
3 import era.mi.logic.types.BitVector.BitVectorMutator;
4 import era.mi.logic.wires.Wire.WireEnd;
7 * Outputs 1 when the number of 1 inputs is odd.
9 * @author Fabian Stemmler
11 public class XorGate extends MultiInputGate
13 public XorGate(int processTime, WireEnd out, WireEnd... in)
15 super(processTime, BitVectorMutator::xor, out, in);