Completion of ReadEnd and ReadWriteEnd addition
[Mograsim.git] / era.mi / src / era / mi / logic / tests / ComponentTest.java
1 package era.mi.logic.tests;\r
2 \r
3 import static org.junit.jupiter.api.Assertions.assertArrayEquals;\r
4 import static org.junit.jupiter.api.Assertions.assertEquals;\r
5 import static org.junit.jupiter.api.Assertions.fail;\r
6 \r
7 import java.util.function.LongConsumer;\r
8 \r
9 import org.junit.jupiter.api.Test;\r
10 \r
11 import era.mi.logic.Simulation;\r
12 import era.mi.logic.components.Connector;\r
13 import era.mi.logic.components.Demux;\r
14 import era.mi.logic.components.Merger;\r
15 import era.mi.logic.components.Mux;\r
16 import era.mi.logic.components.Splitter;\r
17 import era.mi.logic.components.TriStateBuffer;\r
18 import era.mi.logic.components.gates.AndGate;\r
19 import era.mi.logic.components.gates.NotGate;\r
20 import era.mi.logic.components.gates.OrGate;\r
21 import era.mi.logic.components.gates.XorGate;\r
22 import era.mi.logic.types.Bit;\r
23 import era.mi.logic.types.BitVector;\r
24 import era.mi.logic.wires.Wire;\r
25 import era.mi.logic.wires.Wire.ReadEnd;\r
26 import era.mi.logic.wires.Wire.ReadWriteEnd;\r
27 \r
28 class ComponentTest\r
29 {\r
30 \r
31         @Test\r
32         void circuitExampleTest()\r
33         {\r
34                 Simulation.TIMELINE.reset();\r
35                 Wire a = new Wire(1, 1), b = new Wire(1, 1), c = new Wire(1, 10), d = new Wire(2, 1), e = new Wire(1, 1), f = new Wire(1, 1),\r
36                                 g = new Wire(1, 1), h = new Wire(2, 1), i = new Wire(2, 1), j = new Wire(1, 1), k = new Wire(1, 1);\r
37                 new AndGate(1, f.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd());\r
38                 new NotGate(1, f.createReadOnlyEnd(), g.createReadWriteEnd());\r
39                 new Merger(h.createReadWriteEnd(), c.createReadOnlyEnd(), g.createReadOnlyEnd());\r
40                 new Mux(1, i.createReadWriteEnd(), e.createReadOnlyEnd(), h.createReadOnlyEnd(), d.createReadOnlyEnd());\r
41                 new Splitter(i.createReadOnlyEnd(), k.createReadWriteEnd(), j.createReadWriteEnd());\r
42 \r
43                 a.createReadWriteEnd().feedSignals(Bit.ZERO);\r
44                 b.createReadWriteEnd().feedSignals(Bit.ONE);\r
45                 c.createReadWriteEnd().feedSignals(Bit.ZERO);\r
46                 d.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ONE);\r
47                 e.createReadWriteEnd().feedSignals(Bit.ZERO);\r
48 \r
49                 Simulation.TIMELINE.executeAll();\r
50 \r
51                 assertEquals(Bit.ONE, j.getValue());\r
52                 assertEquals(Bit.ZERO, k.getValue());\r
53         }\r
54 \r
55         @Test\r
56         void splitterTest()\r
57         {\r
58                 Simulation.TIMELINE.reset();\r
59                 Wire a = new Wire(3, 1), b = new Wire(2, 1), c = new Wire(3, 1), in = new Wire(8, 1);\r
60                 in.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
61                 new Splitter(in.createReadOnlyEnd(), a.createReadWriteEnd(), b.createReadWriteEnd(), c.createReadWriteEnd());\r
62 \r
63                 Simulation.TIMELINE.executeAll();\r
64 \r
65                 assertBitArrayEquals(a.getValues(), Bit.ZERO, Bit.ONE, Bit.ZERO);\r
66                 assertBitArrayEquals(b.getValues(), Bit.ONE, Bit.ZERO);\r
67                 assertBitArrayEquals(c.getValues(), Bit.ONE, Bit.ZERO, Bit.ONE);\r
68         }\r
69 \r
70         @Test\r
71         void mergerTest()\r
72         {\r
73                 Simulation.TIMELINE.reset();\r
74                 Wire a = new Wire(3, 1), b = new Wire(2, 1), c = new Wire(3, 1), out = new Wire(8, 1);\r
75                 a.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO);\r
76                 b.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO);\r
77                 c.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE);\r
78 \r
79                 new Merger(out.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd());\r
80 \r
81                 Simulation.TIMELINE.executeAll();\r
82 \r
83                 assertBitArrayEquals(out.getValues(), Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
84         }\r
85 \r
86         @Test\r
87         void triStateBufferTest()\r
88         {\r
89                 Wire a = new Wire(1, 1), b = new Wire(1, 1), en = new Wire(1, 1), notEn = new Wire(1, 1);\r
90                 new NotGate(1, en.createReadOnlyEnd(), notEn.createReadWriteEnd());\r
91                 new TriStateBuffer(1, a.createReadOnlyEnd(), b.createReadWriteEnd(), en.createReadOnlyEnd());\r
92                 new TriStateBuffer(1, b.createReadOnlyEnd(), a.createReadWriteEnd(), notEn.createReadOnlyEnd());\r
93 \r
94                 ReadWriteEnd enI = en.createReadWriteEnd(), aI = a.createReadWriteEnd(), bI = b.createReadWriteEnd();\r
95                 enI.feedSignals(Bit.ONE);\r
96                 aI.feedSignals(Bit.ONE);\r
97                 bI.feedSignals(Bit.Z);\r
98 \r
99                 Simulation.TIMELINE.executeAll();\r
100 \r
101                 assertEquals(Bit.ONE, b.getValue());\r
102 \r
103                 bI.feedSignals(Bit.ZERO);\r
104 \r
105                 Simulation.TIMELINE.executeAll();\r
106 \r
107                 assertEquals(Bit.X, b.getValue());\r
108                 assertEquals(Bit.ONE, a.getValue());\r
109 \r
110                 aI.clearSignals();\r
111                 enI.feedSignals(Bit.ZERO);\r
112 \r
113                 Simulation.TIMELINE.executeAll();\r
114 \r
115                 assertEquals(Bit.ZERO, a.getValue());\r
116 \r
117         }\r
118 \r
119         @Test\r
120         void muxTest()\r
121         {\r
122                 Simulation.TIMELINE.reset();\r
123                 Wire a = new Wire(4, 3), b = new Wire(4, 6), c = new Wire(4, 4), select = new Wire(2, 5), out = new Wire(4, 1);\r
124                 ReadWriteEnd selectIn = select.createReadWriteEnd();\r
125 \r
126                 selectIn.feedSignals(Bit.ZERO, Bit.ZERO);\r
127                 a.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
128                 c.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
129 \r
130                 new Mux(1, out.createReadWriteEnd(), select.createReadOnlyEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd());\r
131                 Simulation.TIMELINE.executeAll();\r
132 \r
133                 assertBitArrayEquals(out.getValues(), Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
134                 selectIn.feedSignals(Bit.ZERO, Bit.ONE);\r
135                 Simulation.TIMELINE.executeAll();\r
136 \r
137                 assertBitArrayEquals(out.getValues(), Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
138 \r
139                 selectIn.feedSignals(Bit.ONE, Bit.ONE);\r
140                 Simulation.TIMELINE.executeAll();\r
141 \r
142                 assertBitArrayEquals(out.getValues(), Bit.Z, Bit.Z, Bit.Z, Bit.Z);\r
143 \r
144         }\r
145 \r
146         @Test\r
147         void demuxTest()\r
148         {\r
149                 Simulation.TIMELINE.reset();\r
150                 Wire a = new Wire(4, 3), b = new Wire(4, 6), c = new Wire(4, 4), select = new Wire(2, 5), in = new Wire(4, 1);\r
151                 ReadWriteEnd selectIn = select.createReadWriteEnd();\r
152 \r
153                 selectIn.feedSignals(Bit.ZERO, Bit.ZERO);\r
154                 in.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
155 \r
156                 new Demux(1, in.createReadOnlyEnd(), select.createReadOnlyEnd(), a.createReadWriteEnd(), b.createReadWriteEnd(), c.createReadWriteEnd());\r
157                 Simulation.TIMELINE.executeAll();\r
158 \r
159                 assertBitArrayEquals(a.getValues(), Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
160                 assertBitArrayEquals(b.getValues(), Bit.U, Bit.U, Bit.U, Bit.U);\r
161                 assertBitArrayEquals(c.getValues(), Bit.U, Bit.U, Bit.U, Bit.U);\r
162                 selectIn.feedSignals(Bit.ZERO, Bit.ONE);\r
163                 Simulation.TIMELINE.executeAll();\r
164 \r
165                 assertBitArrayEquals(a.getValues(), Bit.Z, Bit.Z, Bit.Z, Bit.Z);\r
166                 assertBitArrayEquals(b.getValues(), Bit.U, Bit.U, Bit.U, Bit.U);\r
167                 assertBitArrayEquals(c.getValues(), Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
168 \r
169                 selectIn.feedSignals(Bit.ONE, Bit.ONE);\r
170                 Simulation.TIMELINE.executeAll();\r
171 \r
172                 assertBitArrayEquals(a.getValues(), Bit.Z, Bit.Z, Bit.Z, Bit.Z);\r
173                 assertBitArrayEquals(b.getValues(), Bit.U, Bit.U, Bit.U, Bit.U);\r
174                 assertBitArrayEquals(c.getValues(), Bit.Z, Bit.Z, Bit.Z, Bit.Z);\r
175 \r
176         }\r
177 \r
178         @Test\r
179         void andTest()\r
180         {\r
181                 Simulation.TIMELINE.reset();\r
182                 Wire a = new Wire(4, 1), b = new Wire(4, 3), c = new Wire(4, 1);\r
183                 new AndGate(1, c.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd());\r
184                 a.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
185                 b.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
186 \r
187                 Simulation.TIMELINE.executeAll();\r
188 \r
189                 assertBitArrayEquals(c.getValues(), Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
190         }\r
191 \r
192         @Test\r
193         void orTest()\r
194         {\r
195                 Simulation.TIMELINE.reset();\r
196                 Wire a = new Wire(4, 1), b = new Wire(4, 3), c = new Wire(4, 1);\r
197                 new OrGate(1, c.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd());\r
198                 a.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
199                 b.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
200 \r
201                 Simulation.TIMELINE.executeAll();\r
202 \r
203                 assertBitArrayEquals(c.getValues(), Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ONE);\r
204         }\r
205 \r
206         @Test\r
207         void xorTest()\r
208         {\r
209                 Simulation.TIMELINE.reset();\r
210                 Wire a = new Wire(3, 1), b = new Wire(3, 2), c = new Wire(3, 1), d = new Wire(3, 1);\r
211                 new XorGate(1, d.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd());\r
212                 a.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ONE);\r
213                 b.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE);\r
214                 c.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE);\r
215 \r
216                 Simulation.TIMELINE.executeAll();\r
217 \r
218                 assertBitArrayEquals(d.getValues(), Bit.ZERO, Bit.ONE, Bit.ONE);\r
219         }\r
220 \r
221         @Test\r
222         void notTest()\r
223         {\r
224                 Simulation.TIMELINE.reset();\r
225                 Wire a = new Wire(3, 1), b = new Wire(3, 2);\r
226                 new NotGate(1, a.createReadOnlyEnd(), b.createReadWriteEnd());\r
227                 a.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ONE);\r
228 \r
229                 Simulation.TIMELINE.executeAll();\r
230 \r
231                 assertBitArrayEquals(b.getValues(), Bit.ONE, Bit.ZERO, Bit.ZERO);\r
232         }\r
233 \r
234         @Test\r
235         void rsLatchCircuitTest()\r
236         {\r
237                 Simulation.TIMELINE.reset();\r
238                 Wire r = new Wire(1, 1), s = new Wire(1, 1), t1 = new Wire(1, 15), t2 = new Wire(1, 1), q = new Wire(1, 1), nq = new Wire(1, 1);\r
239 \r
240                 new OrGate(1, t2.createReadWriteEnd(), r.createReadOnlyEnd(), nq.createReadOnlyEnd());\r
241                 new OrGate(1, t1.createReadWriteEnd(), s.createReadOnlyEnd(), q.createReadOnlyEnd());\r
242                 new NotGate(1, t2.createReadOnlyEnd(), q.createReadWriteEnd());\r
243                 new NotGate(1, t1.createReadOnlyEnd(), nq.createReadWriteEnd());\r
244 \r
245                 ReadWriteEnd sIn = s.createReadWriteEnd(), rIn = r.createReadWriteEnd();\r
246 \r
247                 sIn.feedSignals(Bit.ONE);\r
248                 rIn.feedSignals(Bit.ZERO);\r
249 \r
250                 Simulation.TIMELINE.executeAll();\r
251 \r
252                 assertEquals(Bit.ONE, q.getValue());\r
253                 assertEquals(Bit.ZERO, nq.getValue());\r
254 \r
255                 sIn.feedSignals(Bit.ZERO);\r
256 \r
257                 Simulation.TIMELINE.executeAll();\r
258                 assertEquals(Bit.ONE, q.getValue());\r
259                 assertEquals(Bit.ZERO, nq.getValue());\r
260 \r
261                 rIn.feedSignals(Bit.ONE);\r
262 \r
263                 Simulation.TIMELINE.executeAll();\r
264 \r
265                 assertEquals(Bit.ZERO, q.getValue());\r
266                 assertEquals(Bit.ONE, nq.getValue());\r
267         }\r
268 \r
269         @Test\r
270         void numericValueTest()\r
271         {\r
272                 Simulation.TIMELINE.reset();\r
273 \r
274                 Wire a = new Wire(4, 1);\r
275                 a.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ONE, Bit.ONE);\r
276 \r
277                 Simulation.TIMELINE.executeAll();\r
278 \r
279                 assertEquals(15, a.getUnsignedValue());\r
280                 assertEquals(-1, a.getSignedValue());\r
281         }\r
282 \r
283         @Test\r
284         void multipleInputs()\r
285         {\r
286                 Simulation.TIMELINE.reset();\r
287                 Wire w = new Wire(2, 1);\r
288                 ReadWriteEnd wI1 = w.createReadWriteEnd(), wI2 = w.createReadWriteEnd();\r
289                 wI1.feedSignals(Bit.ONE, Bit.Z);\r
290                 wI2.feedSignals(Bit.Z, Bit.X);\r
291                 Simulation.TIMELINE.executeAll();\r
292                 assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.X);\r
293 \r
294                 wI2.feedSignals(Bit.ZERO, Bit.Z);\r
295                 Simulation.TIMELINE.executeAll();\r
296                 assertBitArrayEquals(w.getValues(), Bit.X, Bit.Z);\r
297 \r
298                 wI2.feedSignals(Bit.Z, Bit.Z);\r
299                 Simulation.TIMELINE.executeAll();\r
300                 assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.Z);\r
301 \r
302                 wI2.feedSignals(Bit.ONE, Bit.Z);\r
303                 ReadEnd rE = w.createReadOnlyEnd();\r
304                 rE.addObserver((i, oldValues) -> fail("WireEnd notified observer, although value did not change."));\r
305                 Simulation.TIMELINE.executeAll();\r
306                 rE.close();\r
307                 wI1.feedSignals(Bit.X, Bit.X);\r
308                 Simulation.TIMELINE.executeAll();\r
309                 wI1.addObserver((i, oldValues) -> fail("WireEnd notified observer, although it was closed."));\r
310                 wI1.close();\r
311                 assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.Z);\r
312         }\r
313 \r
314         @Test\r
315         void wireConnections()\r
316         {\r
317                 // Nur ein Experiment, was über mehrere 'passive' Bausteine hinweg passieren würde\r
318 \r
319                 Simulation.TIMELINE.reset();\r
320 \r
321                 Wire a = new Wire(1, 2);\r
322                 Wire b = new Wire(1, 2);\r
323                 Wire c = new Wire(1, 2);\r
324                 ReadWriteEnd aI = a.createReadWriteEnd();\r
325                 ReadWriteEnd bI = b.createReadWriteEnd();\r
326                 ReadWriteEnd cI = c.createReadWriteEnd();\r
327 \r
328                 TestBitDisplay test = new TestBitDisplay(c.createReadOnlyEnd());\r
329                 TestBitDisplay test2 = new TestBitDisplay(a.createReadOnlyEnd());\r
330                 LongConsumer print = time -> System.out.format("Time %2d\n   a: %s\n   b: %s\n   c: %s\n", time, a, b, c);\r
331 \r
332                 cI.feedSignals(Bit.ONE);\r
333                 test.assertAfterSimulationIs(print, Bit.ONE);\r
334 \r
335                 cI.feedSignals(Bit.X);\r
336                 test.assertAfterSimulationIs(print, Bit.X);\r
337 \r
338                 cI.feedSignals(Bit.X);\r
339                 cI.feedSignals(Bit.Z);\r
340                 test.assertAfterSimulationIs(print, Bit.Z);\r
341 \r
342                 new Connector(b.createReadWriteEnd(), c.createReadWriteEnd()).connect();\r
343                 test.assertAfterSimulationIs(print, Bit.Z);\r
344                 System.err.println("ONE");\r
345                 bI.feedSignals(Bit.ONE);\r
346                 test.assertAfterSimulationIs(print, Bit.ONE);\r
347                 System.err.println("ZERO");\r
348                 bI.feedSignals(Bit.ZERO);\r
349                 test.assertAfterSimulationIs(print, Bit.ZERO);\r
350                 System.err.println("Z");\r
351                 bI.feedSignals(Bit.Z);\r
352                 test.assertAfterSimulationIs(print, Bit.Z);\r
353 \r
354                 new Connector(a.createReadWriteEnd(), b.createReadWriteEnd()).connect();\r
355                 System.err.println("Z 2");\r
356                 aI.feedSignals(Bit.Z);\r
357                 test.assertAfterSimulationIs(print, Bit.Z);\r
358                 test2.assertAfterSimulationIs(Bit.Z);\r
359                 System.err.println("ONE 2");\r
360                 aI.feedSignals(Bit.ONE);\r
361                 test.assertAfterSimulationIs(print, Bit.ONE);\r
362                 test2.assertAfterSimulationIs(Bit.ONE);\r
363                 System.err.println("ZERO 2");\r
364                 aI.feedSignals(Bit.ZERO);\r
365                 test.assertAfterSimulationIs(print, Bit.ZERO);\r
366                 test2.assertAfterSimulationIs(Bit.ZERO);\r
367                 System.err.println("Z 2 II");\r
368                 aI.feedSignals(Bit.Z);\r
369                 test.assertAfterSimulationIs(print, Bit.Z);\r
370                 test2.assertAfterSimulationIs(Bit.Z);\r
371 \r
372                 System.err.println("No Conflict yet");\r
373                 bI.feedSignals(Bit.ONE);\r
374                 test.assertAfterSimulationIs(print, Bit.ONE);\r
375                 test2.assertAfterSimulationIs(Bit.ONE);\r
376                 aI.feedSignals(Bit.ONE);\r
377                 test.assertAfterSimulationIs(print, Bit.ONE);\r
378                 test2.assertAfterSimulationIs(Bit.ONE);\r
379                 System.err.println("Conflict");\r
380                 aI.feedSignals(Bit.ZERO);\r
381                 test.assertAfterSimulationIs(print, Bit.X);\r
382                 test2.assertAfterSimulationIs(Bit.X);\r
383                 aI.feedSignals(Bit.ONE);\r
384                 test.assertAfterSimulationIs(print, Bit.ONE);\r
385                 test2.assertAfterSimulationIs(Bit.ONE);\r
386         }\r
387 \r
388         private static void assertBitArrayEquals(BitVector actual, Bit... expected)\r
389         {\r
390                 assertArrayEquals(expected, actual.getBits());\r
391         }\r
392 }\r