1 package mograsim.logic.core.components.gates;
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3 import mograsim.logic.core.timeline.Timeline;
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4 import mograsim.logic.core.types.BitVector.BitVectorMutator;
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5 import mograsim.logic.core.wires.Wire.ReadEnd;
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6 import mograsim.logic.core.wires.Wire.ReadWriteEnd;
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9 * Outputs 1 when the number of 1 inputs is odd.
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11 * @author Fabian Stemmler
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13 public class XorGate extends MultiInputGate
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15 public XorGate(Timeline timeline, int processTime, ReadWriteEnd out, ReadEnd... in)
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17 super(timeline, processTime, BitVectorMutator::xor, out, in);
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