1 package net.mograsim.logic.model.verilog.model.statements;
3 import java.util.Objects;
6 import net.mograsim.logic.model.verilog.model.expressions.Expression;
7 import net.mograsim.logic.model.verilog.model.signals.NamedSignal;
8 import net.mograsim.logic.model.verilog.model.signals.Signal;
9 import net.mograsim.logic.model.verilog.utils.CollectionsUtils;
11 public class Assign extends Statement
13 private final NamedSignal target;
14 private final Expression source;
16 public Assign(NamedSignal target, Expression source)
18 this.target = Objects.requireNonNull(target);
19 this.source = Objects.requireNonNull(source);
26 if (source.getWidth() != target.getWidth())
27 throw new IllegalArgumentException("Signal widthes don't match");
30 public Signal getTarget()
35 public Expression getSource()
41 public String toVerilogCode()
43 return "assign " + target.toReferenceVerilogCode() + " = " + source.toVerilogCode() + ";";
47 public Set<String> getDefinedNames()
53 public Set<Signal> getDefinedSignals()
59 public Set<Signal> getReferencedSignals()
61 return CollectionsUtils.union(Set.of(target), source.getReferencedSignals());
65 public String toString()
67 return target.getName() + " = " + source;
75 result = prime * result + ((source == null) ? 0 : source.hashCode());
76 result = prime * result + ((target == null) ? 0 : target.hashCode());
81 public boolean equals(Object obj)
87 if (getClass() != obj.getClass())
89 Assign other = (Assign) obj;
92 if (other.source != null)
94 } else if (!source.equals(other.source))
98 if (other.target != null)
100 } else if (!target.equals(other.target))