1 package net.mograsim.logic.core.components;
5 import net.mograsim.logic.core.timeline.Timeline;
6 import net.mograsim.logic.core.timeline.TimelineEventHandler;
7 import net.mograsim.logic.core.types.Bit;
8 import net.mograsim.logic.core.types.BitVector;
9 import net.mograsim.logic.core.wires.CoreWire.ReadEnd;
10 import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
12 public class CoreTriStateBuffer extends BasicCoreComponent
17 public CoreTriStateBuffer(Timeline timeline, int processTime, ReadEnd in, ReadWriteEnd out, ReadEnd enable)
19 super(timeline, processTime);
20 if (in.width() != out.width())
21 throw new IllegalArgumentException(
22 "Tri-state output must have the same amount of bits as the input. Input: " + in.width() + " Output: " + out.width());
23 if (enable.width() != 1)
24 throw new IllegalArgumentException("Tri-state enable must have exactly one bit, not " + enable.width() + ".");
26 in.registerObserver(this);
28 enable.registerObserver(this);
33 protected TimelineEventHandler compute()
35 if (enable.getValue() == Bit.ONE)
37 BitVector inValues = in.getValues();
38 return e -> out.feedSignals(inValues);
40 return e -> out.clearSignals();
44 public List<ReadEnd> getAllInputs()
46 return List.of(in, enable);
50 public List<ReadWriteEnd> getAllOutputs()