1 package net.mograsim.logic.core.components.gates;
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3 import java.util.List;
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5 import net.mograsim.logic.core.components.BasicComponent;
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6 import net.mograsim.logic.core.timeline.Timeline;
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7 import net.mograsim.logic.core.types.BitVector.BitVectorMutator;
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8 import net.mograsim.logic.core.types.MutationOperation;
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9 import net.mograsim.logic.core.wires.Wire.ReadEnd;
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10 import net.mograsim.logic.core.wires.Wire.ReadWriteEnd;
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12 public abstract class MultiInputGate extends BasicComponent
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14 protected ReadEnd[] in;
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15 protected ReadWriteEnd out;
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16 protected final int length;
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17 protected MutationOperation op;
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18 protected boolean invert = false;
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20 protected MultiInputGate(Timeline timeline, int processTime, MutationOperation op, ReadWriteEnd out, ReadEnd... in)
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22 super(timeline, processTime);
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24 length = out.length();
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25 this.in = in.clone();
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27 throw new IllegalArgumentException(String.format("Cannot create gate with %d wires.", in.length));
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28 for (ReadEnd w : in)
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30 if (w.length() != length)
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31 throw new IllegalArgumentException("All wires connected to the gate must be of uniform length.");
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32 w.registerObserver(this);
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37 protected MultiInputGate(Timeline timeline, int processTime, MutationOperation op, boolean invert, ReadWriteEnd out, ReadEnd... in)
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39 this(timeline, processTime, op, out, in);
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40 this.invert = invert;
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44 public List<ReadEnd> getAllInputs()
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50 public List<ReadWriteEnd> getAllOutputs()
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52 return List.of(out);
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56 protected void compute()
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58 BitVectorMutator mutator = BitVectorMutator.empty();
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59 for (ReadEnd w : in)
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60 op.apply(mutator, w.getValues());
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61 out.feedSignals(invert ? mutator.get().not() : mutator.get());
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