projects
/
Mograsim.git
/ blobdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
|
commitdiff
|
tree
raw
|
inline
| side by side
Timeline now passed via constructor
[Mograsim.git]
/
era.mi
/
src
/
era
/
mi
/
logic
/
components
/
ManualSwitch.java
diff --git
a/era.mi/src/era/mi/logic/components/ManualSwitch.java
b/era.mi/src/era/mi/logic/components/ManualSwitch.java
index
0b694a4
..
450fa51
100644
(file)
--- a/
era.mi/src/era/mi/logic/components/ManualSwitch.java
+++ b/
era.mi/src/era/mi/logic/components/ManualSwitch.java
@@
-2,6
+2,7
@@
package era.mi.logic.components;
\r
import java.util.List;
\r
\r
\r
import java.util.List;
\r
\r
+import era.mi.logic.timeline.Timeline;
\r
import era.mi.logic.types.Bit;
\r
import era.mi.logic.wires.Wire.ReadEnd;
\r
import era.mi.logic.wires.Wire.ReadWriteEnd;
\r
import era.mi.logic.types.Bit;
\r
import era.mi.logic.wires.Wire.ReadEnd;
\r
import era.mi.logic.wires.Wire.ReadWriteEnd;
\r
@@
-12,13
+13,14
@@
import era.mi.logic.wires.Wire.ReadWriteEnd;
* @author Christian Femers
\r
*
\r
*/
\r
* @author Christian Femers
\r
*
\r
*/
\r
-public class ManualSwitch
implement
s Component
\r
+public class ManualSwitch
extend
s Component
\r
{
\r
private ReadWriteEnd output;
\r
private boolean isOn;
\r
\r
{
\r
private ReadWriteEnd output;
\r
private boolean isOn;
\r
\r
- public ManualSwitch(ReadWriteEnd output)
\r
+ public ManualSwitch(
Timeline timeline,
ReadWriteEnd output)
\r
{
\r
{
\r
+ super(timeline);
\r
if (output.length() != 1)
\r
throw new IllegalArgumentException("Switch output can be only a single wire");
\r
this.output = output;
\r
if (output.length() != 1)
\r
throw new IllegalArgumentException("Switch output can be only a single wire");
\r
this.output = output;
\r