import era.mi.logic.types.BitVector.BitVectorMutator;\r
import era.mi.logic.types.MutationOperation;\r
import era.mi.logic.wires.Wire.ReadEnd;\r
import era.mi.logic.types.BitVector.BitVectorMutator;\r
import era.mi.logic.types.MutationOperation;\r
import era.mi.logic.wires.Wire.ReadEnd;\r
- protected MultiInputGate(int processTime, MutationOperation op, ReadWriteEnd out, ReadEnd... in)\r
+ protected MultiInputGate(Timeline timeline, int processTime, MutationOperation op, ReadWriteEnd out, ReadEnd... in)\r