-package era.mi.logic.tests;
-
-import static org.junit.jupiter.api.Assertions.*;
-
-import java.util.Arrays;
-
-import org.junit.jupiter.api.Test;
-
-import era.mi.logic.Bit;
-import era.mi.logic.Simulation;
-import era.mi.logic.components.Merger2;
-import era.mi.logic.components.Mux;
-import era.mi.logic.components.Mux2;
-import era.mi.logic.components.Splitter;
-import era.mi.logic.components.gates.AndGate;
-import era.mi.logic.components.gates.NotGate;
-import era.mi.logic.components.gates.OrGate;
-import era.mi.logic.wires.WireArray;
-import era.mi.logic.wires.WireArray.WireArrayInput;
-
-class ComponentTest
-{
-
-// @Test
-// void circuitExampleTest()
-// {
-// Simulation.TIMELINE.reset();
-// WireArray a = new WireArray(1, 1), b = new WireArray(1, 1), c = new WireArray(1, 10), d = new WireArray(2, 1), e = new WireArray(1, 1),
-// f = new WireArray(1, 1), g = new WireArray(1, 1), h = new WireArray(2, 1), i = new WireArray(2, 1), j = new WireArray(1, 1), k = new WireArray(1, 1);
-// new AndGate(1, a, b, f);
-// new NotGate(1, f, g);
-// new Merger2(h, c, g);
-// new Mux(1, h, d, e, i);
-// new Splitter(i, k, j);
-//
-// a.createInput().feedSignals(Bit.ZERO);
-// b.createInput().feedSignals(Bit.ONE);
-// c.createInput().feedSignals(Bit.ZERO);
-// d.createInput().feedSignals(Bit.ONE, Bit.ONE);
-// e.createInput().feedSignals(Bit.ONE);
-//
-// while(Simulation.TIMELINE.hasNext())
-// {
-// Simulation.TIMELINE.executeNext();
-// }
-//
-// assertEquals(Simulation.TIMELINE.getSimulationTime(), 14);
-// assertEquals(Bit.ONE, j.getValue());
-// assertEquals(Bit.ZERO, k.getValue());
-// }
-//
-// @Test
-// void splitterTest()
-// {
-// Simulation.TIMELINE.reset();
-// WireArray a = new WireArray(3, 1), b = new WireArray(2, 1), c = new WireArray(3, 1), in = new WireArray(8, 1);
-// in.createInput().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO,Bit.ONE, Bit.ZERO, Bit.ONE);
-// new Splitter(in, a, b, c);
-//
-// while(Simulation.TIMELINE.hasNext())
-// {
-// Simulation.TIMELINE.executeNext();
-// }
-//
-// assertTrue(Arrays.equals(a.getValues(), new Bit[] { Bit.ZERO, Bit.ONE, Bit.ZERO }));
-// assertTrue(Arrays.equals(b.getValues(), new Bit[] { Bit.ONE, Bit.ZERO }));
-// assertTrue(Arrays.equals(c.getValues(), new Bit[] { Bit.ONE, Bit.ZERO, Bit.ONE }));
-// }
-//
-// @Test
-// void mergerTest()
-// {
-// Simulation.TIMELINE.reset();
-// WireArray a = new WireArray(3, 1), b = new WireArray(2, 1), c = new WireArray(3, 1), out = new WireArray(8, 1);
-// a.createInput().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO);
-// b.createInput().feedSignals(Bit.ONE, Bit.ZERO);
-// c.createInput().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE);
-//
-// new Merger2(out, a, b, c);
-//
-// while(Simulation.TIMELINE.hasNext())
-// {
-// Simulation.TIMELINE.executeNext();
-// }
-//
-// assertTrue(Arrays.equals(out.getValues(), new Bit[] { Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE }));
-// }
-
- @Test
- void muxTest()
- {
- Simulation.TIMELINE.reset();
- WireArray a = new WireArray(1, 3), b = new WireArray(1, 2), select = new WireArray(1, 1), out = new WireArray(1, 1);
- WireArrayInput selectIn = select.createInput();
-
- selectIn.feedSignals(Bit.ZERO);
- a.createInput().feedSignals(Bit.ONE);
- b.createInput().feedSignals(Bit.ZERO);
-
- new Mux2(1, out, select, a, b);
- assertEquals(Bit.Z, out.getValue());
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
-
- assertEquals(Bit.ONE, out.getValue());
- selectIn.feedSignals(Bit.ONE);
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
-
- assertEquals(out.getValue(), Bit.ZERO);
- }
-
- @Test
- void andTest()
- {
- Simulation.TIMELINE.reset();
- AndGate gate = new AndGate(1, new WireArray(4, 1), new WireArray(4, 1), new WireArray(4, 1));
- gate.getA().createInput().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);
- gate.getB().createInput().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);
-
-
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
- assertTrue(Arrays.equals(gate.getOut().getValues(), new Bit[] { Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ZERO }));
- }
-
- @Test
- void orTest()
- {
- Simulation.TIMELINE.reset();
- OrGate gate = new OrGate(1, new WireArray(4, 1), new WireArray(4, 1), new WireArray(4, 1));
- gate.getA().createInput().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);
- gate.getB().createInput().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);
-
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
-
- assertTrue(Arrays.equals(gate.getOut().getValues(), new Bit[] { Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ONE }));
- }
-
- @Test
- void rsLatchCircuitTest()
- {
- Simulation.TIMELINE.reset();
- WireArray r = new WireArray(1, 1), s = new WireArray(1, 1), t1 = new WireArray(1, 15), t2 = new WireArray(1, 1), q = new WireArray(1, 1),
- nq = new WireArray(1, 1);
-
- new OrGate(1, r, nq, t2);
- new OrGate(1, s, q, t1);
- new NotGate(1, t2, q);
- new NotGate(1, t1, nq);
-
- WireArrayInput sIn = s.createInput(), rIn = r.createInput();
-
- sIn.feedSignals(Bit.ONE);
- rIn.feedSignals(Bit.ZERO);
-
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
-
- assertEquals(q.getValue(), Bit.ONE);
- assertEquals(nq.getValue(), Bit.ZERO);
-
- sIn.feedSignals(Bit.ZERO);
-
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
-
- assertEquals(q.getValue(), Bit.ONE);
- assertEquals(nq.getValue(), Bit.ZERO);
-
- rIn.feedSignals(Bit.ONE);
-
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
-
- assertEquals(q.getValue(), Bit.ZERO);
- assertEquals(nq.getValue(), Bit.ONE);
- }
-
- @Test
- void numericValueTest()
- {
- Simulation.TIMELINE.reset();
-
- WireArray a = new WireArray(4, 1);
- a.createInput().feedSignals(Bit.ONE, Bit.ONE, Bit.ONE, Bit.ONE);
-
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
-
- assertEquals(a.getUnsignedValue(), 15);
- assertEquals(a.getSignedValue(), -1);
- }
-
- @Test
- void multipleInputs()
- {
- Simulation.TIMELINE.reset();
- WireArray w = new WireArray(2, 1);
- WireArrayInput wI1 = w.createInput(), wI2 = w.createInput();
- wI1.feedSignals(Bit.ONE, Bit.Z);
- wI2.feedSignals(Bit.Z, Bit.X);
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
- assertTrue(Arrays.equals(w.getValues(), new Bit[] { Bit.ONE, Bit.X }));
-
- wI2.feedSignals(Bit.ZERO, Bit.Z);
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
- assertTrue(Arrays.equals(w.getValues(), new Bit[] { Bit.X, Bit.Z }));
-
- wI2.feedSignals(Bit.Z, Bit.Z);
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
- assertTrue(Arrays.equals(w.getValues(), new Bit[] { Bit.ONE, Bit.Z }));
-
- wI2.feedSignals(Bit.ONE, Bit.Z);
- w.addObserver((i) -> fail("WireArray notified observer, although value did not change."));
- while(Simulation.TIMELINE.hasNext())
- {
- Simulation.TIMELINE.executeNext();
- }
- assertTrue(Arrays.equals(w.getValues(), new Bit[] { Bit.ONE, Bit.Z }));
- }
-}
+package era.mi.logic.tests;\r
+\r
+import static org.junit.jupiter.api.Assertions.*;\r
+\r
+import java.util.Arrays;\r
+import java.util.function.LongConsumer;\r
+\r
+import org.junit.jupiter.api.Test;\r
+\r
+import era.mi.logic.Simulation;\r
+import era.mi.logic.components.Connector;\r
+import era.mi.logic.components.Demux;\r
+import era.mi.logic.components.Merger;\r
+import era.mi.logic.components.Mux;\r
+import era.mi.logic.components.Splitter;\r
+import era.mi.logic.components.TriStateBuffer;\r
+import era.mi.logic.components.gates.AndGate;\r
+import era.mi.logic.components.gates.NotGate;\r
+import era.mi.logic.components.gates.OrGate;\r
+import era.mi.logic.components.gates.XorGate;\r
+import era.mi.logic.types.Bit;\r
+import era.mi.logic.wires.Wire;\r
+import era.mi.logic.wires.Wire.WireEnd;\r
+\r
+@SuppressWarnings("unused")\r
+class ComponentTest\r
+{\r
+\r
+ @Test\r
+ void circuitExampleTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire a = new Wire(1, 1), b = new Wire(1, 1), c = new Wire(1, 10), d = new Wire(2, 1), e = new Wire(1, 1), f = new Wire(1, 1),\r
+ g = new Wire(1, 1), h = new Wire(2, 1), i = new Wire(2, 1), j = new Wire(1, 1), k = new Wire(1, 1);\r
+ new AndGate(1, f.createEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd());\r
+ new NotGate(1, f.createReadOnlyEnd(), g.createEnd());\r
+ new Merger(h.createEnd(), c.createReadOnlyEnd(), g.createReadOnlyEnd());\r
+ new Mux(1, i.createEnd(), e.createReadOnlyEnd(), h.createReadOnlyEnd(), d.createReadOnlyEnd());\r
+ new Splitter(i.createReadOnlyEnd(), k.createEnd(), j.createEnd());\r
+\r
+ a.createEnd().feedSignals(Bit.ZERO);\r
+ b.createEnd().feedSignals(Bit.ONE);\r
+ c.createEnd().feedSignals(Bit.ZERO);\r
+ d.createEnd().feedSignals(Bit.ONE, Bit.ONE);\r
+ e.createEnd().feedSignals(Bit.ZERO);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertEquals(Bit.ONE, j.getValue());\r
+ assertEquals(Bit.ZERO, k.getValue());\r
+ }\r
+\r
+ @Test\r
+ void splitterTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire a = new Wire(3, 1), b = new Wire(2, 1), c = new Wire(3, 1), in = new Wire(8, 1);\r
+ in.createEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
+ new Splitter(in.createReadOnlyEnd(), a.createEnd(), b.createEnd(), c.createEnd());\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(a.getValues(), Bit.ZERO, Bit.ONE, Bit.ZERO);\r
+ assertBitArrayEquals(b.getValues(), Bit.ONE, Bit.ZERO);\r
+ assertBitArrayEquals(c.getValues(), Bit.ONE, Bit.ZERO, Bit.ONE);\r
+ }\r
+\r
+ @Test\r
+ void mergerTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire a = new Wire(3, 1), b = new Wire(2, 1), c = new Wire(3, 1), out = new Wire(8, 1);\r
+ a.createEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO);\r
+ b.createEnd().feedSignals(Bit.ONE, Bit.ZERO);\r
+ c.createEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE);\r
+\r
+ new Merger(out.createEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd());\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertTrue(\r
+ Arrays.equals(out.getValues(), new Bit[] { Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE }));\r
+ }\r
+\r
+ @Test\r
+ void triStateBufferTest()\r
+ {\r
+ Wire a = new Wire(1, 1), b = new Wire(1, 1), en = new Wire(1, 1), notEn = new Wire(1, 1);\r
+ new NotGate(1, en.createReadOnlyEnd(), notEn.createEnd());\r
+ new TriStateBuffer(1, a.createReadOnlyEnd(), b.createEnd(), en.createReadOnlyEnd());\r
+ new TriStateBuffer(1, b.createReadOnlyEnd(), a.createEnd(), notEn.createReadOnlyEnd());\r
+\r
+ WireEnd enI = en.createEnd(), aI = a.createEnd(), bI = b.createEnd();\r
+ enI.feedSignals(Bit.ONE);\r
+ aI.feedSignals(Bit.ONE);\r
+ bI.feedSignals(Bit.Z);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertEquals(Bit.ONE, b.getValue());\r
+\r
+ bI.feedSignals(Bit.ZERO);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertEquals(Bit.X, b.getValue());\r
+ assertEquals(Bit.ONE, a.getValue());\r
+\r
+ aI.clearSignals();\r
+ enI.feedSignals(Bit.ZERO);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertEquals(Bit.ZERO, a.getValue());\r
+\r
+ }\r
+\r
+ @Test\r
+ void muxTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire a = new Wire(4, 3), b = new Wire(4, 6), c = new Wire(4, 4), select = new Wire(2, 5), out = new Wire(4, 1);\r
+ WireEnd selectIn = select.createEnd();\r
+\r
+ selectIn.feedSignals(Bit.ZERO, Bit.ZERO);\r
+ a.createEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
+ c.createEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
+\r
+ new Mux(1, out.createEnd(), select.createReadOnlyEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd());\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(out.getValues(), Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
+ selectIn.feedSignals(Bit.ZERO, Bit.ONE);\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(out.getValues(), Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
+\r
+ selectIn.feedSignals(Bit.ONE, Bit.ONE);\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(out.getValues(), Bit.Z, Bit.Z, Bit.Z, Bit.Z);\r
+\r
+ }\r
+\r
+ @Test\r
+ void demuxTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire a = new Wire(4, 3), b = new Wire(4, 6), c = new Wire(4, 4), select = new Wire(2, 5), in = new Wire(4, 1);\r
+ WireEnd selectIn = select.createEnd();\r
+\r
+ selectIn.feedSignals(Bit.ZERO, Bit.ZERO);\r
+ in.createEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
+\r
+ new Demux(1, in.createReadOnlyEnd(), select.createReadOnlyEnd(), a.createEnd(), b.createEnd(), c.createEnd());\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(a.getValues(), Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
+ assertBitArrayEquals(b.getValues(), Bit.U, Bit.U, Bit.U, Bit.U);\r
+ assertBitArrayEquals(c.getValues(), Bit.U, Bit.U, Bit.U, Bit.U);\r
+ selectIn.feedSignals(Bit.ZERO, Bit.ONE);\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(a.getValues(), Bit.Z, Bit.Z, Bit.Z, Bit.Z);\r
+ assertBitArrayEquals(b.getValues(), Bit.U, Bit.U, Bit.U, Bit.U);\r
+ assertBitArrayEquals(c.getValues(), Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO);\r
+\r
+ selectIn.feedSignals(Bit.ONE, Bit.ONE);\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(a.getValues(), Bit.Z, Bit.Z, Bit.Z, Bit.Z);\r
+ assertBitArrayEquals(b.getValues(), Bit.U, Bit.U, Bit.U, Bit.U);\r
+ assertBitArrayEquals(c.getValues(), Bit.Z, Bit.Z, Bit.Z, Bit.Z);\r
+\r
+ }\r
+\r
+ @Test\r
+ void andTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire a = new Wire(4, 1), b = new Wire(4, 3), c = new Wire(4, 1);\r
+ new AndGate(1, c.createEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd());\r
+ a.createEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
+ b.createEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(c.getValues(), Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
+ }\r
+\r
+ @Test\r
+ void orTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire a = new Wire(4, 1), b = new Wire(4, 3), c = new Wire(4, 1);\r
+ new OrGate(1, c.createEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd());\r
+ a.createEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
+ b.createEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(c.getValues(), Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ONE);\r
+ }\r
+\r
+ @Test\r
+ void xorTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire a = new Wire(3, 1), b = new Wire(3, 2), c = new Wire(3, 1), d = new Wire(3, 1);\r
+ new XorGate(1, d.createEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd());\r
+ a.createEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ONE);\r
+ b.createEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE);\r
+ c.createEnd().feedSignals(Bit.ONE, Bit.ZERO, Bit.ONE);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(d.getValues(), Bit.ZERO, Bit.ONE, Bit.ONE);\r
+ }\r
+\r
+ @Test\r
+ void notTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire a = new Wire(3, 1), b = new Wire(3, 2);\r
+ new NotGate(1, a.createReadOnlyEnd(), b.createEnd());\r
+ a.createEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ONE);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertBitArrayEquals(b.getValues(), Bit.ONE, Bit.ZERO, Bit.ZERO);\r
+ }\r
+\r
+ @Test\r
+ void rsLatchCircuitTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire r = new Wire(1, 1), s = new Wire(1, 1), t1 = new Wire(1, 15), t2 = new Wire(1, 1), q = new Wire(1, 1), nq = new Wire(1, 1);\r
+\r
+ new OrGate(1, t2.createEnd(), r.createReadOnlyEnd(), nq.createReadOnlyEnd());\r
+ new OrGate(1, t1.createEnd(), s.createReadOnlyEnd(), q.createReadOnlyEnd());\r
+ new NotGate(1, t2.createReadOnlyEnd(), q.createEnd());\r
+ new NotGate(1, t1.createReadOnlyEnd(), nq.createEnd());\r
+\r
+ WireEnd sIn = s.createEnd(), rIn = r.createEnd();\r
+\r
+ sIn.feedSignals(Bit.ONE);\r
+ rIn.feedSignals(Bit.ZERO);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertEquals(Bit.ONE, q.getValue());\r
+ assertEquals(Bit.ZERO, nq.getValue());\r
+\r
+ sIn.feedSignals(Bit.ZERO);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+ assertEquals(Bit.ONE, q.getValue());\r
+ assertEquals(Bit.ZERO, nq.getValue());\r
+\r
+ rIn.feedSignals(Bit.ONE);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertEquals(Bit.ZERO, q.getValue());\r
+ assertEquals(Bit.ONE, nq.getValue());\r
+ }\r
+\r
+ @Test\r
+ void numericValueTest()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+\r
+ Wire a = new Wire(4, 1);\r
+ a.createEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ONE, Bit.ONE);\r
+\r
+ Simulation.TIMELINE.executeAll();\r
+\r
+ assertEquals(15, a.getUnsignedValue());\r
+ assertEquals(-1, a.getSignedValue());\r
+ }\r
+\r
+ @Test\r
+ void multipleInputs()\r
+ {\r
+ Simulation.TIMELINE.reset();\r
+ Wire w = new Wire(2, 1);\r
+ WireEnd wI1 = w.createEnd(), wI2 = w.createEnd();\r
+ wI1.feedSignals(Bit.ONE, Bit.Z);\r
+ wI2.feedSignals(Bit.Z, Bit.X);\r
+ Simulation.TIMELINE.executeAll();\r
+ assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.X);\r
+\r
+ wI2.feedSignals(Bit.ZERO, Bit.Z);\r
+ Simulation.TIMELINE.executeAll();\r
+ assertBitArrayEquals(w.getValues(), Bit.X, Bit.Z);\r
+\r
+ wI2.feedSignals(Bit.Z, Bit.Z);\r
+ Simulation.TIMELINE.executeAll();\r
+ assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.Z);\r
+\r
+ wI2.feedSignals(Bit.ONE, Bit.Z);\r
+ w.addObserver((i, oldValues) -> fail("WireArray notified observer, although value did not change."));\r
+ Simulation.TIMELINE.executeAll();\r
+ assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.Z);\r
+ }\r
+\r
+ @Test\r
+ void wireConnections()\r
+ {\r
+ // Nur ein Experiment, was über mehrere 'passive' Bausteine hinweg passieren würde\r
+\r
+ Simulation.TIMELINE.reset();\r
+\r
+ Wire a = new Wire(1, 2);\r
+ Wire b = new Wire(1, 2);\r
+ Wire c = new Wire(1, 2);\r
+ WireEnd aI = a.createEnd();\r
+ WireEnd bI = b.createEnd();\r
+ WireEnd cI = c.createEnd();\r
+\r
+ TestBitDisplay test = new TestBitDisplay(c.createReadOnlyEnd());\r
+ TestBitDisplay test2 = new TestBitDisplay(a.createReadOnlyEnd());\r
+ LongConsumer print = time -> System.out.format("Time %2d\n a: %s\n b: %s\n c: %s\n", time, a, b, c);\r
+\r
+ cI.feedSignals(Bit.ONE);\r
+ test.assertAfterSimulationIs(print, Bit.ONE);\r
+\r
+ cI.feedSignals(Bit.X);\r
+ test.assertAfterSimulationIs(print, Bit.X);\r
+\r
+ cI.feedSignals(Bit.X);\r
+ cI.feedSignals(Bit.Z);\r
+ test.assertAfterSimulationIs(print, Bit.Z);\r
+\r
+ new Connector(b.createEnd(), c.createEnd()).connect();\r
+ test.assertAfterSimulationIs(print, Bit.Z);\r
+ System.err.println("ONE");\r
+ bI.feedSignals(Bit.ONE);\r
+ test.assertAfterSimulationIs(print, Bit.ONE);\r
+ System.err.println("ZERO");\r
+ bI.feedSignals(Bit.ZERO);\r
+ test.assertAfterSimulationIs(print, Bit.ZERO);\r
+ System.err.println("Z");\r
+ bI.feedSignals(Bit.Z);\r
+ test.assertAfterSimulationIs(print, Bit.Z);\r
+\r
+ new Connector(a.createEnd(), b.createEnd()).connect();\r
+ System.err.println("Z 2");\r
+ aI.feedSignals(Bit.Z);\r
+ test.assertAfterSimulationIs(print, Bit.Z);\r
+ test2.assertAfterSimulationIs(Bit.Z);\r
+ System.err.println("ONE 2");\r
+ aI.feedSignals(Bit.ONE);\r
+ test.assertAfterSimulationIs(print, Bit.ONE);\r
+ test2.assertAfterSimulationIs(Bit.ONE);\r
+ System.err.println("ZERO 2");\r
+ aI.feedSignals(Bit.ZERO);\r
+ test.assertAfterSimulationIs(print, Bit.ZERO);\r
+ test2.assertAfterSimulationIs(Bit.ZERO);\r
+ System.err.println("Z 2 II");\r
+ aI.feedSignals(Bit.Z);\r
+ test.assertAfterSimulationIs(print, Bit.Z);\r
+ test2.assertAfterSimulationIs(Bit.Z);\r
+\r
+ System.err.println("No Conflict yet");\r
+ bI.feedSignals(Bit.ONE);\r
+ test.assertAfterSimulationIs(print, Bit.ONE);\r
+ test2.assertAfterSimulationIs(Bit.ONE);\r
+ aI.feedSignals(Bit.ONE);\r
+ test.assertAfterSimulationIs(print, Bit.ONE);\r
+ test2.assertAfterSimulationIs(Bit.ONE);\r
+ System.err.println("Conflict");\r
+ aI.feedSignals(Bit.ZERO);\r
+ test.assertAfterSimulationIs(print, Bit.X);\r
+ test2.assertAfterSimulationIs(Bit.X);\r
+ aI.feedSignals(Bit.ONE);\r
+ test.assertAfterSimulationIs(print, Bit.ONE);\r
+ test2.assertAfterSimulationIs(Bit.ONE);\r
+ }\r
+\r
+ private static void assertBitArrayEquals(Bit[] actual, Bit... expected)\r
+ {\r
+ assertArrayEquals(expected, actual);\r
+ }\r
+}\r