import net.mograsim.logic.core.wires.CoreWire;
import net.mograsim.logic.model.model.components.atomic.ModelFixedOutput;
import net.mograsim.logic.model.model.wires.Pin;
import net.mograsim.logic.core.wires.CoreWire;
import net.mograsim.logic.model.model.components.atomic.ModelFixedOutput;
import net.mograsim.logic.model.model.wires.Pin;
- public void createAndLinkComponent(Timeline timeline, LogicModelParameters params, ModelFixedOutput modelComponent,
+ public void createAndLinkComponent(Timeline timeline, CoreModelParameters params, ModelFixedOutput modelComponent,
Map<Pin, CoreWire> logicWiresPerPin)
{
logicWiresPerPin.get(modelComponent.getPin("out")).createReadWriteEnd().feedSignals(modelComponent.bits);
Map<Pin, CoreWire> logicWiresPerPin)
{
logicWiresPerPin.get(modelComponent.getPin("out")).createReadWriteEnd().feedSignals(modelComponent.bits);