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ModelComponentToVerilogConverter can now convert TriStateBuffers
[Mograsim.git]
/
plugins
/
net.mograsim.logic.model.verilog
/
src
/
net
/
mograsim
/
logic
/
model
/
verilog
/
converter
/
VerilogEmulatedModelPin.java
diff --git
a/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/converter/VerilogEmulatedModelPin.java
b/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/converter/VerilogEmulatedModelPin.java
index
b27b485
..
feccad1
100644
(file)
--- a/
plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/converter/VerilogEmulatedModelPin.java
+++ b/
plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/converter/VerilogEmulatedModelPin.java
@@
-3,8
+3,8
@@
package net.mograsim.logic.model.verilog.converter;
import java.util.Objects;
import java.util.Set;
import java.util.Objects;
import java.util.Set;
-import net.mograsim.logic.model.verilog.model.IOPort;
-import net.mograsim.logic.model.verilog.model.Signal;
+import net.mograsim.logic.model.verilog.model.
signals.
IOPort;
+import net.mograsim.logic.model.verilog.model.
signals.
Signal;
public class VerilogEmulatedModelPin
{
public class VerilogEmulatedModelPin
{