ModelComponentToVerilogConverter can now convert TriStateBuffers

[Mograsim.git] / plugins / net.mograsim.logic.model.verilog / src / net / mograsim / logic / model / verilog / model / signals / Wire.java

diff --git a/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/signals/Wire.java b/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/signals/Wire.java
index b6d331c..10e2a50 100644 (file)
--- a/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/signals/Wire.java
+++ b/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/signals/Wire.java
@@ -1,6 +1,6 @@
 package net.mograsim.logic.model.verilog.model.signals;
 
 package net.mograsim.logic.model.verilog.model.signals;
 

-public class Wire extends NamedSignal
+public class Wire extends Signal

 {
        public Wire(String name, int width)
        {
 {
        public Wire(String name, int width)
        {