Exchanged all Bit[] by BitVector, tests work

[Mograsim.git] / era.mi / src / era / mi / logic / components / Demux.java

diff --git a/era.mi/src/era/mi/logic/components/Demux.java b/era.mi/src/era/mi/logic/components/Demux.java
index 89a06fe..ffc1bba 100644 (file)
--- a/era.mi/src/era/mi/logic/components/Demux.java
+++ b/era.mi/src/era/mi/logic/components/Demux.java
@@ -1,7 +1,5 @@
 package era.mi.logic.components;\r
 \r
-import java.util.Arrays;\r
-import java.util.Collections;\r
 import java.util.List;\r
 \r
 import era.mi.logic.wires.Wire;\r
@@ -22,11 +20,11 @@ public class Demux extends BasicComponent
        private int selected = -1;\r
 \r
        /**\r
-        * Input {@link Wire}s and out must be of uniform length\r
+        * Output {@link Wire}s and in must be of uniform length\r
         * \r
-        * @param out     Must be of uniform length with all inputs.\r
-        * @param select  Indexes the input array which is to be mapped to the output. Must have enough bits to index all inputs.\r
-        * @param outputs One of these inputs is mapped to the output, depending on the select bits\r
+        * @param in      Must be of uniform length with all outputs.\r
+        * @param select  Indexes the output array to which the input is mapped. Must have enough bits to index all outputs.\r
+        * @param outputs One of these outputs receives the input signal, depending on the select bits\r
         */\r
        public Demux(int processTime, WireEnd in, WireEnd select, WireEnd... outputs)\r
        {\r
@@ -71,12 +69,12 @@ public class Demux extends BasicComponent
        @Override\r
        public List<WireEnd> getAllInputs()\r
        {\r
-               return Collections.unmodifiableList(Arrays.asList(in, select));\r
+               return List.of(in, select);\r
        }\r
 \r
        @Override\r
        public List<WireEnd> getAllOutputs()\r
        {\r
-               return Collections.unmodifiableList(Arrays.asList(outputs));\r
+               return List.of(outputs);\r
        }\r
 }\r