WireArray(Input) is now Wire(End); all in-/outputs are now WireEnds

[Mograsim.git] / era.mi / src / era / mi / logic / components / gates / AndGate.java

diff --git a/era.mi/src/era/mi/logic/components/gates/AndGate.java b/era.mi/src/era/mi/logic/components/gates/AndGate.java
index ffb5b5a..2722f03 100644 (file)
--- a/era.mi/src/era/mi/logic/components/gates/AndGate.java
+++ b/era.mi/src/era/mi/logic/components/gates/AndGate.java
@@ -1,10 +1,12 @@
 package era.mi.logic.components.gates;
 
 import era.mi.logic.Util;
-import era.mi.logic.wires.WireArray;
+import era.mi.logic.wires.Wire.WireEnd;
 
-public class AndGate extends MultiInputGate {
-       public AndGate(int processTime, WireArray out, WireArray... in) {
+public class AndGate extends MultiInputGate
+{
+       public AndGate(int processTime, WireEnd out, WireEnd... in)
+       {
                super(processTime, Util::and, out, in);
        }
 }