Suppressed warnings where the thing warned about is intentional

[Mograsim.git] / era.mi / src / era / mi / logic / components / gates / AndGate.java

diff --git a/era.mi/src/era/mi/logic/components/gates/AndGate.java b/era.mi/src/era/mi/logic/components/gates/AndGate.java
index 5c81406..2d35e61 100644 (file)
--- a/era.mi/src/era/mi/logic/components/gates/AndGate.java
+++ b/era.mi/src/era/mi/logic/components/gates/AndGate.java
@@ -1,59 +1,14 @@
-package era.mi.logic.components.gates;
-
-import java.util.Arrays;
-import java.util.Collections;
-import java.util.List;
-
-import era.mi.logic.Util;
-import era.mi.logic.components.BasicComponent;
-import era.mi.logic.wires.WireArray;
-import era.mi.logic.wires.WireArray.WireArrayInput;
-
-public class AndGate extends BasicComponent
-{
-       private WireArray a, b, out;
-       private WireArrayInput outI;
-       
-       public AndGate(int processTime, WireArray a, WireArray b, WireArray out)
-       {
-               super(processTime);
-               this.a = a;
-               a.addObserver(this);
-               this.b = b;
-               b.addObserver(this);
-               this.out = out;
-               outI = out.createInput();
-       }
-
-       protected void compute()
-       {
-               outI.feedSignals(Util.and(a.getValues(), b.getValues()));
-       }
-
-       public WireArray getA()
-       {
-               return a;
-       }
-
-       public WireArray getB()
-       {
-               return b;
-       }
-
-       public WireArray getOut()
-       {
-               return out;
-       }
-
-       @Override
-       public List<WireArray> getAllInputs()
-       {
-               return Collections.unmodifiableList(Arrays.asList(a, b));
-       }
-
-       @Override
-       public List<WireArray> getAllOutputs()
-       {
-               return Collections.unmodifiableList(Arrays.asList(out));
-       }
-}
+package era.mi.logic.components.gates;\r
+\r
+import era.mi.logic.timeline.Timeline;\r
+import era.mi.logic.types.BitVector.BitVectorMutator;\r
+import era.mi.logic.wires.Wire.ReadEnd;\r
+import era.mi.logic.wires.Wire.ReadWriteEnd;\r
+\r
+public class AndGate extends MultiInputGate\r
+{\r
+       public AndGate(Timeline timeline, int processTime, ReadWriteEnd out, ReadEnd... in)\r
+       {\r
+               super(timeline, processTime, BitVectorMutator::and, out, in);\r
+       }\r
+}\r