Fixed calculations concerning U, tests work now just like before
[Mograsim.git] / era.mi / src / era / mi / logic / tests / ComponentTest.java
index 81a2e1f..c566b56 100644 (file)
@@ -9,6 +9,7 @@ import org.junit.jupiter.api.Test;
 \r
 import era.mi.logic.Bit;\r
 import era.mi.logic.Simulation;\r
+import era.mi.logic.components.Connector;\r
 import era.mi.logic.components.Demux;\r
 import era.mi.logic.components.Merger;\r
 import era.mi.logic.components.Mux;\r
@@ -21,6 +22,7 @@ import era.mi.logic.components.gates.XorGate;
 import era.mi.logic.wires.WireArray;\r
 import era.mi.logic.wires.WireArray.WireArrayEnd;\r
 \r
+@SuppressWarnings("unused")\r
 class ComponentTest\r
 {\r
 \r
@@ -92,6 +94,7 @@ class ComponentTest
                WireArrayEnd enI = en.createInput(), aI = a.createInput(), bI = b.createInput();\r
                enI.feedSignals(Bit.ONE);\r
                aI.feedSignals(Bit.ONE);\r
+               bI.feedSignals(Bit.Z);\r
 \r
                Simulation.TIMELINE.executeAll();\r
 \r
@@ -292,7 +295,7 @@ class ComponentTest
                assertBitArrayEquals(w.getValues(), Bit.ONE, Bit.Z);\r
        }\r
 \r
-//     @Test\r
+       @Test\r
        void wireConnections()\r
        {\r
                // Nur ein Experiment, was über mehrere 'passive' Bausteine hinweg passieren würde\r
@@ -320,7 +323,7 @@ class ComponentTest
                cI.feedSignals(Bit.Z);\r
                test.assertAfterSimulationIs(print, Bit.Z);\r
 \r
-               new Connector(b, c);\r
+               new Connector(b, c).connect();\r
                test.assertAfterSimulationIs(print, Bit.Z);\r
                System.err.println("ONE");\r
                bI.feedSignals(Bit.ONE);\r
@@ -332,7 +335,7 @@ class ComponentTest
                bI.feedSignals(Bit.Z);\r
                test.assertAfterSimulationIs(print, Bit.Z);\r
 \r
-               new Connector(a, b);\r
+               new Connector(a, b).connect();\r
                System.err.println("Z 2");\r
                aI.feedSignals(Bit.Z);\r
                test.assertAfterSimulationIs(print, Bit.Z);\r