Completion of ReadEnd and ReadWriteEnd addition

[Mograsim.git] / era.mi / src / era / mi / logic / tests / GUITest.java

diff --git a/era.mi/src/era/mi/logic/tests/GUITest.java b/era.mi/src/era/mi/logic/tests/GUITest.java
index 814a3b7..8ff7384 100644 (file)
--- a/era.mi/src/era/mi/logic/tests/GUITest.java
+++ b/era.mi/src/era/mi/logic/tests/GUITest.java
@@ -38,13 +38,13 @@ public class GUITest extends JPanel
        Wire q = new Wire(1, WIRE_DELAY);\r
        Wire nq = new Wire(1, WIRE_DELAY);\r
 \r
-       ManualSwitch rIn = new ManualSwitch(r.createEnd());\r
-       ManualSwitch sIn = new ManualSwitch(s.createEnd());\r
+       ManualSwitch rIn = new ManualSwitch(r.createReadWriteEnd());\r
+       ManualSwitch sIn = new ManualSwitch(s.createReadWriteEnd());\r
 \r
-       OrGate or1 = new OrGate(OR_DELAY, t2.createEnd(), r.createReadOnlyEnd(), nq.createReadOnlyEnd());\r
-       OrGate or2 = new OrGate(OR_DELAY, t1.createEnd(), s.createReadOnlyEnd(), q.createReadOnlyEnd());\r
-       NotGate not1 = new NotGate(NOT_DELAY, t2.createReadOnlyEnd(), q.createEnd());\r
-       NotGate not2 = new NotGate(NOT_DELAY, t1.createReadOnlyEnd(), nq.createEnd());\r
+       OrGate or1 = new OrGate(OR_DELAY, t2.createReadWriteEnd(), r.createReadOnlyEnd(), nq.createReadOnlyEnd());\r
+       OrGate or2 = new OrGate(OR_DELAY, t1.createReadWriteEnd(), s.createReadOnlyEnd(), q.createReadOnlyEnd());\r
+       NotGate not1 = new NotGate(NOT_DELAY, t2.createReadOnlyEnd(), q.createReadWriteEnd());\r
+       NotGate not2 = new NotGate(NOT_DELAY, t1.createReadOnlyEnd(), nq.createReadWriteEnd());\r
 \r
        Map<ManualSwitch, Rectangle> switchMap = new HashMap<>();\r
 \r