-package net.mograsim.logic.core.components.gates;
-
-import java.util.List;
-
-import net.mograsim.logic.core.components.BasicComponent;
-import net.mograsim.logic.core.timeline.Timeline;
-import net.mograsim.logic.core.types.MutationOperation;
-import net.mograsim.logic.core.types.BitVector.BitVectorMutator;
-import net.mograsim.logic.core.wires.Wire.ReadEnd;
-import net.mograsim.logic.core.wires.Wire.ReadWriteEnd;
-
-public abstract class MultiInputGate extends BasicComponent
-{
- protected ReadEnd[] in;
- protected ReadWriteEnd out;
- protected final int length;
- protected MutationOperation op;
-
- protected MultiInputGate(Timeline timeline, int processTime, MutationOperation op, ReadWriteEnd out, ReadEnd... in)
- {
- super(timeline, processTime);
- this.op = op;
- length = out.length();
- this.in = in.clone();
- if (in.length < 1)
- throw new IllegalArgumentException(String.format("Cannot create gate with %d wires.", in.length));
- for (ReadEnd w : in)
- {
- if (w.length() != length)
- throw new IllegalArgumentException("All wires connected to the gate must be of uniform length.");
- w.addObserver(this);
- }
- this.out = out;
- }
-
- @Override
- public List<ReadEnd> getAllInputs()
- {
- return List.of(in);
- }
-
- @Override
- public List<ReadWriteEnd> getAllOutputs()
- {
- return List.of(out);
- }
-
- @Override
- protected void compute()
- {
- BitVectorMutator mutator = BitVectorMutator.empty();
- for (ReadEnd w : in)
- op.apply(mutator, w.getValues());
- out.feedSignals(mutator.get());
- }
-}
+package net.mograsim.logic.core.components.gates;\r
+\r
+import java.util.List;\r
+\r
+import net.mograsim.logic.core.components.BasicComponent;\r
+import net.mograsim.logic.core.timeline.Timeline;\r
+import net.mograsim.logic.core.types.BitVector.BitVectorMutator;\r
+import net.mograsim.logic.core.types.MutationOperation;\r
+import net.mograsim.logic.core.wires.Wire.ReadEnd;\r
+import net.mograsim.logic.core.wires.Wire.ReadWriteEnd;\r
+\r
+public abstract class MultiInputGate extends BasicComponent\r
+{\r
+ protected ReadEnd[] in;\r
+ protected ReadWriteEnd out;\r
+ protected final int length;\r
+ protected MutationOperation op;\r
+ protected boolean invert = false;\r
+\r
+ protected MultiInputGate(Timeline timeline, int processTime, MutationOperation op, ReadWriteEnd out, ReadEnd... in)\r
+ {\r
+ super(timeline, processTime);\r
+ this.op = op;\r
+ length = out.length();\r
+ this.in = in.clone();\r
+ if (in.length < 1)\r
+ throw new IllegalArgumentException(String.format("Cannot create gate with %d wires.", in.length));\r
+ for (ReadEnd w : in)\r
+ {\r
+ if (w.length() != length)\r
+ throw new IllegalArgumentException("All wires connected to the gate must be of uniform length.");\r
+ w.registerObserver(this);\r
+ }\r
+ this.out = out;\r
+ }\r
+\r
+ protected MultiInputGate(Timeline timeline, int processTime, MutationOperation op, boolean invert, ReadWriteEnd out, ReadEnd... in)\r
+ {\r
+ this(timeline, processTime, op, out, in);\r
+ this.invert = invert;\r
+ }\r
+\r
+ @Override\r
+ public List<ReadEnd> getAllInputs()\r
+ {\r
+ return List.of(in);\r
+ }\r
+\r
+ @Override\r
+ public List<ReadWriteEnd> getAllOutputs()\r
+ {\r
+ return List.of(out);\r
+ }\r
+\r
+ @Override\r
+ protected void compute()\r
+ {\r
+ BitVectorMutator mutator = BitVectorMutator.empty();\r
+ for (ReadEnd w : in)\r
+ op.apply(mutator, w.getValues());\r
+ out.feedSignals(invert ? mutator.toBitVector().not() : mutator.toBitVector());\r
+ }\r
+}\r