Added prototype component for main memory
[Mograsim.git] / net.mograsim.logic.core / test / net / mograsim / logic / core / tests / ComponentTest.java
index 9c5a615..d62154e 100644 (file)
@@ -4,8 +4,11 @@ import static org.junit.jupiter.api.Assertions.assertArrayEquals;
 import static org.junit.jupiter.api.Assertions.assertEquals;\r
 import static org.junit.jupiter.api.Assertions.fail;\r
 \r
+import java.math.BigInteger;\r
+import java.util.Random;\r
 import java.util.function.LongConsumer;\r
 \r
+import org.junit.Before;\r
 import org.junit.jupiter.api.Test;\r
 \r
 import net.mograsim.logic.core.components.Connector;\r
@@ -19,6 +22,7 @@ import net.mograsim.logic.core.components.gates.NandGate;
 import net.mograsim.logic.core.components.gates.NorGate;\r
 import net.mograsim.logic.core.components.gates.NotGate;\r
 import net.mograsim.logic.core.components.gates.OrGate;\r
+import net.mograsim.logic.core.components.gates.WordAddressableMemoryComponent;\r
 import net.mograsim.logic.core.components.gates.XorGate;\r
 import net.mograsim.logic.core.timeline.Timeline;\r
 import net.mograsim.logic.core.types.Bit;\r
@@ -32,6 +36,12 @@ class ComponentTest
 {\r
        private Timeline t = new Timeline(11);\r
 \r
+       @Before\r
+       void resetTimeline()\r
+       {\r
+               t.reset();\r
+       }\r
+\r
        @Test\r
        void circuitExampleTest()\r
        {\r
@@ -59,7 +69,6 @@ class ComponentTest
        @Test\r
        void splitterTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 3, 1), b = new Wire(t, 2, 1), c = new Wire(t, 3, 1), in = new Wire(t, 8, 1);\r
                in.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE, Bit.ZERO, Bit.ONE);\r
                new Splitter(t, in.createReadOnlyEnd(), a.createReadWriteEnd(), b.createReadWriteEnd(), c.createReadWriteEnd());\r
@@ -74,7 +83,6 @@ class ComponentTest
        @Test\r
        void mergerTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 3, 1), b = new Wire(t, 2, 1), c = new Wire(t, 3, 1), out = new Wire(t, 8, 1);\r
                a.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ZERO);\r
                b.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ZERO);\r
@@ -90,7 +98,6 @@ class ComponentTest
        @Test\r
        void fusionTest1()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 3, 1), b = new Wire(t, 2, 1), c = new Wire(t, 3, 1), out = new Wire(t, 8, 1);\r
                Wire.fuse(a, out, 0, 0, a.length);\r
                Wire.fuse(b, out, 0, a.length, b.length);\r
@@ -121,7 +128,6 @@ class ComponentTest
        @Test\r
        void fusionTest2()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 3, 1), b = new Wire(t, 3, 1);\r
                Wire.fuse(a, b);\r
                ReadWriteEnd rw = a.createReadWriteEnd();\r
@@ -136,7 +142,6 @@ class ComponentTest
        @Test\r
        void fusionTest3()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 3, 1), b = new Wire(t, 3, 1);\r
                a.createReadWriteEnd().feedSignals(Bit.Z, Bit.U, Bit.X);\r
                t.executeAll();\r
@@ -193,7 +198,6 @@ class ComponentTest
        @Test\r
        void muxTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 4, 3), b = new Wire(t, 4, 6), c = new Wire(t, 4, 4), select = new Wire(t, 2, 5), out = new Wire(t, 4, 1);\r
                ReadWriteEnd selectIn = select.createReadWriteEnd();\r
 \r
@@ -221,7 +225,6 @@ class ComponentTest
        @Test\r
        void demuxTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 4, 3), b = new Wire(t, 4, 6), c = new Wire(t, 4, 4), select = new Wire(t, 2, 5), in = new Wire(t, 4, 1);\r
                ReadWriteEnd selectIn = select.createReadWriteEnd();\r
 \r
@@ -254,7 +257,6 @@ class ComponentTest
        @Test\r
        void andTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 4, 1), b = new Wire(t, 4, 3), c = new Wire(t, 4, 1);\r
                new AndGate(t, 1, c.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd());\r
                a.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
@@ -268,7 +270,6 @@ class ComponentTest
        @Test\r
        void orTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 4, 1), b = new Wire(t, 4, 3), c = new Wire(t, 4, 1);\r
                new OrGate(t, 1, c.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd());\r
                a.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
@@ -282,7 +283,6 @@ class ComponentTest
        @Test\r
        void nandTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 4, 1), b = new Wire(t, 4, 3), c = new Wire(t, 4, 1), d = new Wire(t, 4, 1);\r
                new NandGate(t, 1, d.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd());\r
                a.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
@@ -297,7 +297,6 @@ class ComponentTest
        @Test\r
        void norTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 4, 1), b = new Wire(t, 4, 3), c = new Wire(t, 4, 1), d = new Wire(t, 4, 1);\r
                new NorGate(t, 1, d.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd());\r
                a.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ZERO, Bit.ZERO);\r
@@ -312,7 +311,6 @@ class ComponentTest
        @Test\r
        void xorTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 3, 1), b = new Wire(t, 3, 2), c = new Wire(t, 3, 1), d = new Wire(t, 3, 1);\r
                new XorGate(t, 1, d.createReadWriteEnd(), a.createReadOnlyEnd(), b.createReadOnlyEnd(), c.createReadOnlyEnd());\r
                a.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ONE);\r
@@ -327,7 +325,6 @@ class ComponentTest
        @Test\r
        void notTest()\r
        {\r
-               t.reset();\r
                Wire a = new Wire(t, 3, 1), b = new Wire(t, 3, 2);\r
                new NotGate(t, 1, a.createReadOnlyEnd(), b.createReadWriteEnd());\r
                a.createReadWriteEnd().feedSignals(Bit.ZERO, Bit.ONE, Bit.ONE);\r
@@ -340,7 +337,6 @@ class ComponentTest
        @Test\r
        void rsLatchCircuitTest()\r
        {\r
-               t.reset();\r
                Wire r = new Wire(t, 1, 1), s = new Wire(t, 1, 1), t1 = new Wire(t, 1, 15), t2 = new Wire(t, 1, 1), q = new Wire(t, 1, 1),\r
                                nq = new Wire(t, 1, 1);\r
 \r
@@ -376,8 +372,6 @@ class ComponentTest
        @Test\r
        void numericValueTest()\r
        {\r
-               t.reset();\r
-\r
                Wire a = new Wire(t, 4, 1);\r
                a.createReadWriteEnd().feedSignals(Bit.ONE, Bit.ONE, Bit.ONE, Bit.ONE);\r
 \r
@@ -426,7 +420,6 @@ class ComponentTest
        @Test\r
        void multipleInputs()\r
        {\r
-               t.reset();\r
                Wire w = new Wire(t, 2, 1);\r
                ReadWriteEnd wI1 = w.createReadWriteEnd(), wI2 = w.createReadWriteEnd();\r
                wI1.feedSignals(Bit.ONE, Bit.Z);\r
@@ -459,8 +452,6 @@ class ComponentTest
        {\r
                // Nur ein Experiment, was über mehrere 'passive' Bausteine hinweg passieren würde\r
 \r
-               t.reset();\r
-\r
                Wire a = new Wire(t, 1, 2);\r
                Wire b = new Wire(t, 1, 2);\r
                Wire c = new Wire(t, 1, 2);\r
@@ -528,6 +519,47 @@ class ComponentTest
                test2.assertAfterSimulationIs(Bit.ONE);\r
        }\r
 \r
+       @Test\r
+       public void wordAddressableMemoryLargeTest()\r
+       {\r
+               Wire rW = new Wire(t, 1, 2);\r
+               Wire data = new Wire(t, 16, 2);\r
+               Wire address = new Wire(t, 64, 2);\r
+               ReadWriteEnd rWI = rW.createReadWriteEnd();\r
+               ReadWriteEnd dataI = data.createReadWriteEnd();\r
+               ReadWriteEnd addressI = address.createReadWriteEnd();\r
+\r
+               WordAddressableMemoryComponent memory = new WordAddressableMemoryComponent(t, 4, 4096L, Long.MAX_VALUE, data.createReadWriteEnd(),\r
+                               rW.createReadOnlyEnd(), address.createReadOnlyEnd());\r
+\r
+               Random r = new Random();\r
+               for (long j = 1; j > 0; j *= 2)\r
+               {\r
+                       for (int i = 0; i < 50; i++)\r
+                       {\r
+                               String sAddress = String.format("%64s", BigInteger.valueOf(4096 + i + j).toString(2)).replace(' ', '0');\r
+                               sAddress = new StringBuilder(sAddress).reverse().toString();\r
+                               BitVector bAddress = BitVector.parse(sAddress);\r
+                               addressI.feedSignals(bAddress);\r
+                               t.executeAll();\r
+                               String random = BigInteger.valueOf(Math.abs(r.nextInt())).toString(5);\r
+                               random = random.substring(Integer.max(0, random.length() - 16));\r
+                               random = String.format("%16s", random).replace(' ', '0');\r
+                               random = random.replace('2', 'X').replace('3', 'Z').replace('4', 'U');\r
+                               BitVector vector = BitVector.parse(random);\r
+                               dataI.feedSignals(vector);\r
+                               rWI.feedSignals(Bit.ZERO);\r
+                               t.executeAll();\r
+                               rWI.feedSignals(Bit.ONE);\r
+                               t.executeAll();\r
+                               dataI.clearSignals();\r
+                               t.executeAll();\r
+\r
+                               assertBitArrayEquals(dataI.getValues(), vector.getBits());\r
+                       }\r
+               }\r
+       }\r
+\r
        private static void assertBitArrayEquals(BitVector actual, Bit... expected)\r
        {\r
                assertArrayEquals(expected, actual.getBits());\r