Shortened the memory test a bit because it was longer than necessary
[Mograsim.git] / net.mograsim.logic.model.am2900 / components / net / mograsim / logic / model / am2900 / components / am2904 / Am2904TestLogic.json
index 3ec88ac..2c007e5 100644 (file)
   "innerScale": 0.4,
   "submodel": {
     "components": [
-      {
-        "id": "xor",
-        "name": "DeserializedSubmodelComponent#0",
-        "pos": {
-          "x": 40.0,
-          "y": 20.0
-        }
-      },
       {
         "id": "NandGate",
         "name": "NandGate#0",
           "x": 5.0,
           "y": 110.0
         },
-        "params": 4
+        "params": {
+          "logicWidth": 4,
+          "orientation": "RIGHT"
+        }
       },
       {
         "id": "WireCrossPoint",
           "y": 149.0
         },
         "params": 1
+      },
+      {
+        "id": "xor",
+        "name": "xor#0",
+        "pos": {
+          "x": 40.0,
+          "y": 20.0
+        }
       }
     ],
     "wires": [
           "pinName": ""
         },
         "pin2": {
-          "compName": "DeserializedSubmodelComponent#0",
+          "compName": "xor#0",
           "pinName": "A"
         },
         "name": "unnamedWire#3",
           "pinName": ""
         },
         "pin2": {
-          "compName": "DeserializedSubmodelComponent#0",
+          "compName": "xor#0",
           "pinName": "B"
         },
         "name": "unnamedWire#4",
       },
       {
         "pin1": {
-          "compName": "DeserializedSubmodelComponent#0",
+          "compName": "xor#0",
           "pinName": "Y"
         },
         "pin2": {
     "pinLabelMargin": 0.5
   },
   "outlineRendererSnippetID": "default",
-  "highLevelStateHandlerSnippetID": "standard",
-  "highLevelStateHandlerParams": {
-    "subcomponentHighLevelStates": {},
-    "atomicHighLevelStates": {}
-  },
+  "highLevelStateHandlerSnippetID": "default",
   "version": "0.1.5"
 }
\ No newline at end of file