The final restructured version for automatic build using maven tycho

[Mograsim.git] / net.mograsim.logic.model.am2900 / components / net / mograsim / logic / model / am2900 / components / fulladder.json

diff --git a/net.mograsim.logic.model.am2900/components/net/mograsim/logic/model/am2900/components/fulladder.json b/net.mograsim.logic.model.am2900/components/net/mograsim/logic/model/am2900/components/fulladder.json
deleted file mode 100644 (file)
index 4ba4b19..0000000
--- a/net.mograsim.logic.model.am2900/components/net/mograsim/logic/model/am2900/components/fulladder.json
+++ /dev/null
@@ -1,204 +0,0 @@
-{
-  "width": 35.0,
-  "height": 30.0,
-  "interfacePins": [
-    {
-      "location": {
-        "x": 0.0,
-        "y": 5.0
-      },
-      "name": "A",
-      "logicWidth": 1,
-      "usage": "INPUT"
-    },
-    {
-      "location": {
-        "x": 0.0,
-        "y": 15.0
-      },
-      "name": "B",
-      "logicWidth": 1,
-      "usage": "INPUT"
-    },
-    {
-      "location": {
-        "x": 0.0,
-        "y": 25.0
-      },
-      "name": "C",
-      "logicWidth": 1,
-      "usage": "INPUT"
-    },
-    {
-      "location": {
-        "x": 35.0,
-        "y": 5.0
-      },
-      "name": "Y",
-      "logicWidth": 1,
-      "usage": "OUTPUT"
-    },
-    {
-      "location": {
-        "x": 35.0,
-        "y": 15.0
-      },
-      "name": "Z",
-      "logicWidth": 1,
-      "usage": "OUTPUT"
-    }
-  ],
-  "innerScale": 0.4,
-  "submodel": {
-    "components": [
-      {
-        "id": "NandGate",
-        "name": "NandGate#0",
-        "pos": {
-          "x": 57.5,
-          "y": 40.0
-        },
-        "params": 1
-      },
-      {
-        "id": "halfadder",
-        "name": "halfadder#0",
-        "pos": {
-          "x": 5.0,
-          "y": 40.0
-        }
-      },
-      {
-        "id": "halfadder",
-        "name": "halfadder#1",
-        "pos": {
-          "x": 45.0,
-          "y": 7.5
-        }
-      }
-    ],
-    "wires": [
-      {
-        "pin1": {
-          "compName": "_submodelinterface",
-          "pinName": "A"
-        },
-        "pin2": {
-          "compName": "halfadder#1",
-          "pinName": "A"
-        },
-        "name": "unnamedWire#0",
-        "path": []
-      },
-      {
-        "pin1": {
-          "compName": "_submodelinterface",
-          "pinName": "B"
-        },
-        "pin2": {
-          "compName": "halfadder#0",
-          "pinName": "A"
-        },
-        "name": "unnamedWire#1"
-      },
-      {
-        "pin1": {
-          "compName": "_submodelinterface",
-          "pinName": "C"
-        },
-        "pin2": {
-          "compName": "halfadder#0",
-          "pinName": "B"
-        },
-        "name": "unnamedWire#2"
-      },
-      {
-        "pin1": {
-          "compName": "halfadder#0",
-          "pinName": "Y"
-        },
-        "pin2": {
-          "compName": "halfadder#1",
-          "pinName": "B"
-        },
-        "name": "unnamedWire#3"
-      },
-      {
-        "pin1": {
-          "compName": "halfadder#0",
-          "pinName": "_Z"
-        },
-        "pin2": {
-          "compName": "NandGate#0",
-          "pinName": "B"
-        },
-        "name": "unnamedWire#4",
-        "path": []
-      },
-      {
-        "pin1": {
-          "compName": "halfadder#1",
-          "pinName": "Y"
-        },
-        "pin2": {
-          "compName": "_submodelinterface",
-          "pinName": "Y"
-        },
-        "name": "unnamedWire#5",
-        "path": []
-      },
-      {
-        "pin1": {
-          "compName": "halfadder#1",
-          "pinName": "_Z"
-        },
-        "pin2": {
-          "compName": "NandGate#0",
-          "pinName": "A"
-        },
-        "name": "unnamedWire#6",
-        "path": [
-          {
-            "x": 82.5,
-            "y": 22.5
-          },
-          {
-            "x": 82.5,
-            "y": 35.0
-          },
-          {
-            "x": 52.5,
-            "y": 35.0
-          },
-          {
-            "x": 52.5,
-            "y": 45.0
-          }
-        ]
-      },
-      {
-        "pin1": {
-          "compName": "NandGate#0",
-          "pinName": "Y"
-        },
-        "pin2": {
-          "compName": "_submodelinterface",
-          "pinName": "Z"
-        },
-        "name": "unnamedWire#7"
-      }
-    ],
-    "version": "0.1.1"
-  },
-  "symbolRendererSnippetID": "simpleRectangularLike",
-  "symbolRendererParams": {
-    "centerText": "fulladder",
-    "centerTextHeight": 5.0,
-    "horizontalComponentCenter": 17.5,
-    "pinLabelHeight": 3.5,
-    "pinLabelMargin": 0.5
-  },
-  "outlineRendererSnippetID": "default",
-  "highLevelStateHandlerSnippetID": "default",
-  "version": "0.1.5"
-}
\ No newline at end of file