Redefined PinUsages; cleaned component JSONs

[Mograsim.git] / plugins / net.mograsim.logic.model.am2900 / src / net / mograsim / logic / model / examples / VerilogExporter.java

diff --git a/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/examples/VerilogExporter.java b/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/examples/VerilogExporter.java
index e5c2443..fb1fd2f 100644 (file)
--- a/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/examples/VerilogExporter.java
+++ b/plugins/net.mograsim.logic.model.am2900/src/net/mograsim/logic/model/examples/VerilogExporter.java
@@ -229,7 +229,8 @@ public class VerilogExporter
        {
                return combinedInterfacePinsPerComponentID.entrySet().stream().collect(Collectors.toMap(Entry::getKey, e ->
                {
-                       List<String> names = e.getValue().values().stream().distinct().collect(Collectors.toList());
+                       List<String> names = e.getValue().values().stream().distinct().sorted().collect(Collectors.toList());
+                       System.out.println("Assuming following order for interface pins of " + e.getKey() + ": " + names);
                        Map<String, Integer> widthesPerName = Arrays.stream(componentsById.get(e.getKey()).interfacePins)
                                        .collect(Collectors.toMap(p -> p.name, p -> p.logicWidth));
                        List<Integer> widthes = names.stream().map(widthesPerName::get).collect(Collectors.toList());
@@ -305,13 +306,14 @@ public class VerilogExporter
 
        private void appendInterface(StringBuilder result)
        {
+               result.append("input rst, input clk");
                if (!sortedInterfacePinNames.isEmpty())
                {
                        Map<String, Integer> logicWidthsPerInterfacePinName = Arrays.stream(componentJson.interfacePins)
                                        .collect(Collectors.toMap(p -> p.name, p -> p.logicWidth));
-                       result.append('\n');
                        for (int i = 0; i < sortedInterfacePinNames.size(); i++)
                        {
+                               result.append(",\n");
                                String interfacePinName = sortedInterfacePinNames.get(i);
                                int logicWidth = logicWidthsPerInterfacePinName.get(interfacePinName);
 
@@ -325,10 +327,8 @@ public class VerilogExporter
                                appendLogicWidth(result, logicWidth);
                                result.append(sanitizeVerilog(interfacePinName));
                                result.append("_res");
-                               if (i != sortedInterfacePinNames.size() - 1)
-                                       result.append(',');
-                               result.append('\n');
                        }
+                       result.append('\n');
                }
        }
 
@@ -395,7 +395,12 @@ public class VerilogExporter
 
                        result.append("assign ");
                        result.append(sanitizeVerilog(resultWireName));
-                       result.append(" = ");
+                       result.append(" = rst ? ");
+                       result.append(logicWidth * 2);
+                       result.append("'b");
+                       for (int i = 0; i < logicWidth; i++)
+                               result.append("10");
+                       result.append(" : ");
                        result.append(sanitizeVerilog(lastWireName));
                        result.append(";\n");
                }
@@ -423,9 +428,13 @@ public class VerilogExporter
                        result.append(COMPONENT_PREFIX);
                        String paramsString = subcomponentParams.params == JsonNull.INSTANCE ? "" : subcomponentParams.params.toString();
                        result.append(sanitizeVerilog(subcomponentID + paramsString));
-                       result.append(" (");
+                       result.append(' ');
+                       // abuse the pinIdentifierGenerator for making these unique
+                       result.append(pinIdentifierGenerator.getPinID("comp", subcomponentName));
+                       result.append(" (rst, clk");
                        for (int i = 0; i < subcomponentInterfacePinNames.size(); i++)
                        {
+                               result.append(",\n  ");
                                String innerPinID = pinIdentifierGenerator.getPinID(subcomponentName, subcomponentInterfacePinNames.get(i));
 
                                String lastWireName;
@@ -449,13 +458,13 @@ public class VerilogExporter
                                result.append(sanitizeVerilog(nextWireName));
                                result.append(", ");
                                result.append(sanitizeVerilog(resultWireName));
-                               if (i != subcomponentInterfacePinNames.size() - 1)
-                                       result.append(", \n  ");
                        }
                        result.append(");\n\n");
                }
        }
 
+       private static Map<Tuple2<String, JsonElement>, Tuple2<List<String>, List<Integer>>> atomicComponentInterfaces = new HashMap<>();
+
        private Tuple2<List<String>, List<Integer>> getSubcomponentInterfacePinNamesAndWidths(String subcomponentID,
                        JsonElement subcomponentParams)
        {
@@ -463,13 +472,23 @@ public class VerilogExporter
                if (result != null)
                        return result;
 
+               Tuple2<String, JsonElement> subcomponentKey = new Tuple2<>(subcomponentID, subcomponentParams);
+
+               result = atomicComponentInterfaces.get(subcomponentKey);
+               if (result != null)
+                       return result;
+
                Map<String, Pin> pins = IndirectModelComponentCreator
                                .createComponent(new LogicModelModifiable(), subcomponentID, subcomponentParams).getPins();
                List<String> names = pins.keySet().stream().sorted().collect(Collectors.toList());
                List<Integer> widthes = pins.entrySet().stream().sorted(Comparator.comparing(e -> e.getKey())).map(Entry::getValue)
                                .map(p -> p.logicWidth).collect(Collectors.toList());
-               System.out.println("Assuming following order for interface pins of " + subcomponentID + ": " + names);
-               return new Tuple2<>(names, widthes);
+               System.out.println(
+                               "Assuming following order for interface pins of " + subcomponentID + " with params " + subcomponentParams + ": " + names);
+               result = new Tuple2<>(names, widthes);
+
+               atomicComponentInterfaces.put(subcomponentKey, result);
+               return result;
        }
 
        private static void appendLogicWidth(StringBuilder result, int logicWidth)
@@ -534,6 +553,41 @@ public class VerilogExporter
                        this.e1 = e1;
                        this.e2 = e2;
                }
+
+               @Override
+               public int hashCode()
+               {
+                       final int prime = 31;
+                       int result = 1;
+                       result = prime * result + ((e1 == null) ? 0 : e1.hashCode());
+                       result = prime * result + ((e2 == null) ? 0 : e2.hashCode());
+                       return result;
+               }
+
+               @Override
+               public boolean equals(Object obj)
+               {
+                       if (this == obj)
+                               return true;
+                       if (obj == null)
+                               return false;
+                       if (getClass() != obj.getClass())
+                               return false;
+                       Tuple2<?, ?> other = (Tuple2<?, ?>) obj;
+                       if (e1 == null)
+                       {
+                               if (other.e1 != null)
+                                       return false;
+                       } else if (!e1.equals(other.e1))
+                               return false;
+                       if (e2 == null)
+                       {
+                               if (other.e2 != null)
+                                       return false;
+                       } else if (!e2.equals(other.e2))
+                               return false;
+                       return true;
+               }
        }
 
        private static String sanitizeVerilog(String str)