Daniel Kirschten [Thu, 26 Mar 2020 00:39:55 +0000 (01:39 +0100)]
Changed the line ending to LF in the Resource settings in each project
Daniel Kirschten [Thu, 26 Mar 2020 00:28:17 +0000 (01:28 +0100)]
Implemented a part of the Am2910InstrPLA on gate level
Daniel Kirschten [Thu, 26 Mar 2020 00:03:49 +0000 (01:03 +0100)]
Fixed a bug in the ModelAm2910InstrPLA
Daniel Kirschten [Wed, 25 Mar 2020 22:53:24 +0000 (23:53 +0100)]
ReserializeAndVerifyJSONs now uses the unicode escape for mu
Daniel Kirschten [Wed, 25 Mar 2020 22:19:27 +0000 (23:19 +0100)]
Am2910: Changed communication between reg and instrdecode
Daniel Kirschten [Wed, 25 Mar 2020 21:08:31 +0000 (22:08 +0100)]
Grouped some 4 bit wires in the Am2901
Daniel Kirschten [Wed, 25 Mar 2020 18:32:31 +0000 (19:32 +0100)]
Improved layout of andor414
Daniel Kirschten [Wed, 25 Mar 2020 18:29:36 +0000 (19:29 +0100)]
Made and41 smaller
Daniel Kirschten [Wed, 25 Mar 2020 18:26:20 +0000 (19:26 +0100)]
Made the and gate smaller
Daniel Kirschten [Wed, 25 Mar 2020 18:10:54 +0000 (19:10 +0100)]
Built a XNOR gate
Daniel Kirschten [Wed, 25 Mar 2020 18:09:48 +0000 (19:09 +0100)]
VerilogExporter now orders interface pins more transparently
Daniel Kirschten [Wed, 25 Mar 2020 18:07:45 +0000 (19:07 +0100)]
Changed how the SubmodelComponent decides whether to show its submodel
Daniel Kirschten [Sun, 1 Mar 2020 16:26:28 +0000 (17:26 +0100)]
VerilogExporter now "hands through" a clk signal
to avoid combinatorial loops
Daniel Kirschten [Tue, 11 Feb 2020 16:15:33 +0000 (17:15 +0100)]
Merge pull request #11 from MaisiKoleni/config-gh-actions
GitHub Actions setup to test and build Mograsim automatically
Christian Femers [Tue, 11 Feb 2020 01:25:29 +0000 (02:25 +0100)]
GH-Actions clone submodules
Christian Femers [Tue, 11 Feb 2020 01:15:32 +0000 (02:15 +0100)]
Configure GitHub Actions for Mograsim
Daniel Kirschten [Tue, 4 Feb 2020 10:54:19 +0000 (11:54 +0100)]
Generated Verilog now has a RST "pin"
Daniel Kirschten [Tue, 4 Feb 2020 10:53:34 +0000 (11:53 +0100)]
LogicCoreAdapter now makes global statistics for gate count
Daniel Kirschten [Mon, 6 Jan 2020 22:38:22 +0000 (23:38 +0100)]
ModelComponentTestbench's Switches/Displays are named after their pins
Daniel Kirschten [Mon, 6 Jan 2020 22:32:08 +0000 (23:32 +0100)]
ModelComponentTestbench works again
Daniel Kirschten [Sun, 5 Jan 2020 23:13:31 +0000 (00:13 +0100)]
VerilogExporter: Components are now named
Daniel Kirschten [Sun, 5 Jan 2020 22:40:32 +0000 (23:40 +0100)]
VerilogExporter: Fixed serializing components without params
Daniel Kirschten [Sun, 5 Jan 2020 22:18:56 +0000 (23:18 +0100)]
Added a class for exporting component JSONs to Verilog
Daniel Kirschten [Mon, 25 Nov 2019 11:45:12 +0000 (12:45 +0100)]
Made ModelAm2904RegCTInstrDecode more robust against X/U/Z inputs
Daniel Kirschten [Mon, 25 Nov 2019 11:21:32 +0000 (12:21 +0100)]
Improved JavaJsonLineCounter a bit
Daniel Kirschten [Fri, 15 Nov 2019 00:21:44 +0000 (01:21 +0100)]
Switched to using logical U for mnemonic X to avoid glitches in Am2900
Wir machen den Benutzern also ein U für ein X vor.
Daniel Kirschten [Fri, 15 Nov 2019 00:16:14 +0000 (01:16 +0100)]
Changed mnemonic X to use BitVector X; added X for integer immediates
Daniel Kirschten [Wed, 13 Nov 2019 14:28:20 +0000 (15:28 +0100)]
Changed microinstruction column titles to English
Daniel Kirschten [Wed, 13 Nov 2019 12:47:19 +0000 (13:47 +0100)]
Adjusted some param titles
Daniel Kirschten [Wed, 13 Nov 2019 12:07:07 +0000 (13:07 +0100)]
Added short titles for MPM columns
Daniel Kirschten [Wed, 13 Nov 2019 11:27:39 +0000 (12:27 +0100)]
Added possibility to swap column tooltip and title in MPM editor
Daniel Kirschten [Wed, 13 Nov 2019 00:03:07 +0000 (01:03 +0100)]
Updated getting_started.md
Daniel Kirschten [Wed, 30 Oct 2019 21:57:57 +0000 (22:57 +0100)]
Fixed the documentation
Daniel Kirschten [Wed, 30 Oct 2019 21:48:58 +0000 (22:48 +0100)]
Added a (very elaborately _cough_) explanation for gcd.MPM
Daniel Kirschten [Wed, 30 Oct 2019 21:40:08 +0000 (22:40 +0100)]
Added TestGCD
Daniel Kirschten [Wed, 30 Oct 2019 21:21:58 +0000 (22:21 +0100)]
MicroInstructionMemoryParser and MainMemoryParser now use UTF-8
Daniel Kirschten [Wed, 30 Oct 2019 18:17:21 +0000 (19:17 +0100)]
Made hardcoded components slower to fix a timing bug in the Am2900
Daniel Kirschten [Wed, 30 Oct 2019 18:16:52 +0000 (19:16 +0100)]
Fixed a timing bug in SimpleRectangularHardcodedModelComponentAdapter
Daniel Kirschten [Wed, 30 Oct 2019 15:53:10 +0000 (16:53 +0100)]
Fixed a bug in the Am2900
Daniel Kirschten [Wed, 30 Oct 2019 15:49:50 +0000 (16:49 +0100)]
Am2900Machine now resets registers in strict mode too
Christian Femers [Thu, 24 Oct 2019 21:56:34 +0000 (23:56 +0200)]
Changed readme for better status report
Christian Femers [Thu, 24 Oct 2019 21:39:50 +0000 (23:39 +0200)]
Added master build status to readme
Christian Femers [Thu, 24 Oct 2019 21:27:15 +0000 (23:27 +0200)]
added basic travis ci config for testing it
Christian Femers [Wed, 23 Oct 2019 20:57:08 +0000 (22:57 +0200)]
Fixed description in readme
Christian Femers [Wed, 23 Oct 2019 20:56:38 +0000 (22:56 +0200)]
Switched to Maven Tycho 1.5.0
Christian Femers [Thu, 17 Oct 2019 05:04:56 +0000 (07:04 +0200)]
Small fixes to mograsim development environment notes.
Christian Femers [Thu, 17 Oct 2019 02:23:36 +0000 (04:23 +0200)]
Added new Mograsim project wizard and updated getting started.
Christian Femers [Wed, 16 Oct 2019 22:30:19 +0000 (00:30 +0200)]
Removed unused code of Bit
Christian Femers [Wed, 16 Oct 2019 21:51:22 +0000 (23:51 +0200)]
Added note about GitLab CI artifact
Christian Femers [Wed, 16 Oct 2019 20:45:49 +0000 (22:45 +0200)]
Deactivated asm editor temporarily
Christian Femers [Wed, 16 Oct 2019 19:19:43 +0000 (21:19 +0200)]
Fixed repository artifact
Christian Femers [Wed, 16 Oct 2019 19:09:56 +0000 (21:09 +0200)]
Try modified pipeline with repository artifact
Daniel Kirschten [Tue, 15 Oct 2019 08:31:04 +0000 (10:31 +0200)]
Updated to new SWTHelper version
Christian Femers [Mon, 14 Oct 2019 21:23:45 +0000 (23:23 +0200)]
Merge branch 'development' of https://gitlab.lrz.de/lrr-tum/students/eragp-misim-2019.git into development
Christian Femers [Mon, 14 Oct 2019 21:23:35 +0000 (23:23 +0200)]
Automatically add the default Mograsim memory block to the launch
Daniel Kirschten [Mon, 14 Oct 2019 21:23:10 +0000 (23:23 +0200)]
Fixed a bug when the address size is not divisible by 8
Christian Femers [Mon, 14 Oct 2019 21:21:07 +0000 (23:21 +0200)]
Merge branch 'development' of https://gitlab.lrz.de/lrr-tum/students/eragp-misim-2019.git into development
Daniel Kirschten [Mon, 14 Oct 2019 21:15:38 +0000 (23:15 +0200)]
Fixed bounds checking and address length in MainMemoryBlockExtension
Christian Femers [Mon, 14 Oct 2019 20:40:00 +0000 (22:40 +0200)]
Allow to add nature and configure in one step
Christian Femers [Mon, 14 Oct 2019 20:38:44 +0000 (22:38 +0200)]
Fixed JavaDoc
Christian Femers [Mon, 14 Oct 2019 20:18:41 +0000 (22:18 +0200)]
Improved labels and translation
Daniel Kirschten [Sat, 12 Oct 2019 14:21:19 +0000 (16:21 +0200)]
Improved labels of Am2901's subcomponents
Daniel Kirschten [Sat, 12 Oct 2019 14:15:17 +0000 (16:15 +0200)]
Made FixedOutput smaller
Daniel Kirschten [Sat, 12 Oct 2019 14:11:48 +0000 (16:11 +0200)]
Improved BitVectorFormatter for bitvectors of length 1
Daniel Kirschten [Sat, 12 Oct 2019 14:01:10 +0000 (16:01 +0200)]
Some components drawing Bitvectors now draw them fitting to their bounds
Fabian Stemmler [Sat, 12 Oct 2019 13:47:33 +0000 (15:47 +0200)]
Made Am2900 Bus BitDisplays prettier
Daniel Kirschten [Sat, 12 Oct 2019 13:42:07 +0000 (15:42 +0200)]
Made ModelBitDisplay/ManualSwitch smaller
Daniel Kirschten [Sat, 12 Oct 2019 13:10:29 +0000 (15:10 +0200)]
Only BitDisplay now uses dashes instead of Z
Daniel Kirschten [Sat, 12 Oct 2019 12:57:30 +0000 (14:57 +0200)]
Some work on improving BitVector<->String conversions
Fabian Stemmler [Sat, 12 Oct 2019 12:13:53 +0000 (14:13 +0200)]
Rolled back toString change in BitVector, moved it into ModelBitDisplay
Daniel Kirschten [Sat, 12 Oct 2019 11:48:09 +0000 (13:48 +0200)]
Improved RegisterView:
Values are now viewed in hex (if they are binary) and can be written in
hex, dec or as BitVector
Fabian Stemmler [Sat, 12 Oct 2019 11:17:05 +0000 (13:17 +0200)]
toString now returns '-' for BitVectors consisting only of Z
Fabian Stemmler [Sat, 12 Oct 2019 11:16:30 +0000 (13:16 +0200)]
Fixed an IndexOutOfBoundsException
Fabian Stemmler [Sat, 12 Oct 2019 11:16:09 +0000 (13:16 +0200)]
Renamed MainMachineLaunchConfigTab in the Wizard
It was previously called something along the lines of
'testlaunchconfigtab', now it is called 'Main'
Fabian Stemmler [Fri, 11 Oct 2019 13:28:11 +0000 (15:28 +0200)]
MicroInstructionDefinition now also has simple Mnemonics for Am2904
Fabian Stemmler [Fri, 11 Oct 2019 13:17:29 +0000 (15:17 +0200)]
Memory Editor is now more intuitive
Users no longer need to specify the block of memory they want to see.
Instead they can jump to an address or scroll through the table freely.
Issue:
The table does not load new elements when the top or bottom end is
reached with keyboard inputs.
Fabian Stemmler [Thu, 10 Oct 2019 11:57:23 +0000 (13:57 +0200)]
0th Mnemonic is default Mnemonic not otherwise specified
Fabian Stemmler [Thu, 10 Oct 2019 11:56:04 +0000 (13:56 +0200)]
Fixed bug with Exception being thrown with wrong cause
Fabian Stemmler [Sun, 6 Oct 2019 22:01:39 +0000 (00:01 +0200)]
Added null check in dispose() of InstructionView
If editor fails to initialize, memory is still null when dispose is
called.
Fabian Stemmler [Tue, 8 Oct 2019 16:41:35 +0000 (18:41 +0200)]
Fixed typo in model.md
Daniel Kirschten [Mon, 7 Oct 2019 10:09:52 +0000 (12:09 +0200)]
Moved TODOs from getting_started.md to the source code
Daniel Kirschten [Mon, 7 Oct 2019 00:27:29 +0000 (02:27 +0200)]
Added register for PC / BZ
Daniel Kirschten [Mon, 7 Oct 2019 00:25:43 +0000 (02:25 +0200)]
Added register for IR
Daniel Kirschten [Mon, 7 Oct 2019 00:24:16 +0000 (02:24 +0200)]
Added register for muIR
Daniel Kirschten [Mon, 7 Oct 2019 00:06:27 +0000 (02:06 +0200)]
Added Am2910 registers
Daniel Kirschten [Mon, 7 Oct 2019 00:05:49 +0000 (02:05 +0200)]
Fixed the same bug in some Am2900-specific ModelComponents
Daniel Kirschten [Mon, 7 Oct 2019 00:04:52 +0000 (02:04 +0200)]
Changed Modelram5_12's HLS-IDs to have a trailing .q
Daniel Kirschten [Sun, 6 Oct 2019 23:41:26 +0000 (01:41 +0200)]
Merge remote-tracking branch 'origin/development' into development
Daniel Kirschten [Sun, 6 Oct 2019 23:40:37 +0000 (01:40 +0200)]
Added Am2904 registers
Christian Femers [Sun, 6 Oct 2019 23:39:21 +0000 (01:39 +0200)]
Added Mograsim perspective that contains all useful views directly
Daniel Kirschten [Sun, 6 Oct 2019 23:30:16 +0000 (01:30 +0200)]
Made muSR / MSR accessible bit-wise
Daniel Kirschten [Sun, 6 Oct 2019 23:28:44 +0000 (01:28 +0200)]
Re-added Am2901 registers
Daniel Kirschten [Sun, 6 Oct 2019 23:27:47 +0000 (01:27 +0200)]
Restructured register system
Daniel Kirschten [Sun, 6 Oct 2019 22:10:43 +0000 (00:10 +0200)]
Replaced micro symbols with Unicode escape \u00b5
Christian Femers [Sun, 6 Oct 2019 20:13:37 +0000 (22:13 +0200)]
Added RegisterGroups for MachineDefinition
Daniel Kirschten [Sun, 6 Oct 2019 19:28:17 +0000 (21:28 +0200)]
Merge remote-tracking branch 'origin/development' into development
Daniel Kirschten [Sun, 6 Oct 2019 19:27:14 +0000 (21:27 +0200)]
Made punctuation uniform in docs/
Christian Femers [Sun, 6 Oct 2019 19:23:09 +0000 (21:23 +0200)]
Fixed register sorting
Daniel Kirschten [Sun, 6 Oct 2019 19:19:32 +0000 (21:19 +0200)]
Added comment about missing update site
Daniel Kirschten [Sun, 6 Oct 2019 19:11:50 +0000 (21:11 +0200)]
Added comment how to use a local update site