Improvements in the ModelComponentToVerilogConverter:

[Mograsim.git] / plugins / net.mograsim.logic.model.verilog / src / net / mograsim / logic / model / verilog / converter / PinNameBit.java

diff --git a/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/converter/PinNameBit.java b/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/converter/PinNameBit.java
index 461aa02..1a61e08 100644 (file)
--- a/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/converter/PinNameBit.java
+++ b/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/converter/PinNameBit.java
@@ -2,6 +2,9 @@ package net.mograsim.logic.model.verilog.converter;
 
 import java.util.Objects;
 
+import net.mograsim.logic.model.model.components.ModelComponent;
+import net.mograsim.logic.model.model.components.submodels.SubmodelComponent;
+
 public class PinNameBit
 {
        private final String name;
@@ -31,6 +34,16 @@ public class PinNameBit
                return bit;
        }
 
+       public PinBit toPinBit(ModelComponent pinParent)
+       {
+               return new PinBit(pinParent.getPin(name), bit);
+       }
+
+       public PinBit toSubmodelPinBit(SubmodelComponent submodelComponent)
+       {
+               return new PinBit(submodelComponent.getSubmodelPin(name), bit);
+       }
+
        @Override
        public String toString()
        {