ModelComponentToVerilogConverter can now convert TriStateBuffers

[Mograsim.git] / plugins / net.mograsim.logic.model.verilog / src / net / mograsim / logic / model / verilog / model / signals / IOPort.java

diff --git a/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/signals/IOPort.java b/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/signals/IOPort.java
index 7d573bb..291755d 100644 (file)
--- a/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/signals/IOPort.java
+++ b/plugins/net.mograsim.logic.model.verilog/src/net/mograsim/logic/model/verilog/model/signals/IOPort.java
@@ -1,6 +1,6 @@
 package net.mograsim.logic.model.verilog.model.signals;
 
-public abstract class IOPort extends NamedSignal
+public abstract class IOPort extends Signal
 {
        public IOPort(Type type, String name, int width)
        {