import net.mograsim.logic.core.timeline.Timeline;
import net.mograsim.logic.core.types.BitVector;
import net.mograsim.logic.model.model.LogicModel;
+import net.mograsim.logic.model.modeladapter.CoreModelParameters;
import net.mograsim.machine.mi.AssignableMPROM;
import net.mograsim.machine.mi.AssignableMicroInstructionMemory;
import net.mograsim.machine.registers.Register;
Timeline getTimeline();
+ public CoreModelParameters getCoreModelParameters();
+
AssignableMainMemory getMainMemory();
AssignableMicroInstructionMemory getMicroInstructionMemory();