Mograsim.git
2020-03-26 Daniel KirschtenImplemented the YD output of the Am2910InstrPLA in...
2020-03-26 Daniel KirschtenChanged the line ending to LF in the Resource settings...
2020-03-26 Daniel KirschtenImplemented a part of the Am2910InstrPLA on gate level
2020-03-26 Daniel KirschtenFixed a bug in the ModelAm2910InstrPLA
2020-03-25 Daniel KirschtenReserializeAndVerifyJSONs now uses the unicode escape...
2020-03-25 Daniel KirschtenAm2910: Changed communication between reg and instrdecode
2020-03-25 Daniel KirschtenGrouped some 4 bit wires in the Am2901
2020-03-25 Daniel KirschtenImproved layout of andor414
2020-03-25 Daniel KirschtenMade and41 smaller
2020-03-25 Daniel KirschtenMade the and gate smaller
2020-03-25 Daniel KirschtenBuilt a XNOR gate
2020-03-25 Daniel KirschtenVerilogExporter now orders interface pins more transpar...
2020-03-25 Daniel KirschtenChanged how the SubmodelComponent decides whether to...
2020-03-25 Daniel KirschtenVerilogExporter now "hands through" a clk signal
2020-02-11 Daniel KirschtenMerge pull request #11 from MaisiKoleni/config-gh-actions
2020-02-11 Christian FemersGH-Actions clone submodules
2020-02-11 Christian FemersConfigure GitHub Actions for Mograsim
2020-02-04 Daniel KirschtenGenerated Verilog now has a RST "pin"
2020-02-04 Daniel KirschtenLogicCoreAdapter now makes global statistics for gate...
2020-01-06 Daniel KirschtenModelComponentTestbench's Switches/Displays are named...
2020-01-06 Daniel KirschtenModelComponentTestbench works again
2020-01-05 Daniel KirschtenVerilogExporter: Components are now named
2020-01-05 Daniel KirschtenVerilogExporter: Fixed serializing components without...
2020-01-05 Daniel KirschtenAdded a class for exporting component JSONs to Verilog
2019-11-25 Daniel KirschtenMade ModelAm2904RegCTInstrDecode more robust against...
2019-11-25 Daniel KirschtenImproved JavaJsonLineCounter a bit
2019-11-15 Daniel KirschtenSwitched to using logical U for mnemonic X to avoid...
2019-11-15 Daniel KirschtenChanged mnemonic X to use BitVector X; added X for...
2019-11-13 Daniel KirschtenChanged microinstruction column titles to English
2019-11-13 Daniel KirschtenAdjusted some param titles
2019-11-13 Daniel KirschtenAdded short titles for MPM columns
2019-11-13 Daniel KirschtenAdded possibility to swap column tooltip and title...
2019-11-13 Daniel KirschtenUpdated getting_started.md
2019-10-30 Daniel KirschtenFixed the documentation
2019-10-30 Daniel KirschtenAdded a (very elaborately _cough_) explanation for...
2019-10-30 Daniel KirschtenAdded TestGCD
2019-10-30 Daniel KirschtenMicroInstructionMemoryParser and MainMemoryParser now...
2019-10-30 Daniel KirschtenMade hardcoded components slower to fix a timing bug...
2019-10-30 Daniel KirschtenFixed a timing bug in SimpleRectangularHardcodedModelCo...
2019-10-30 Daniel KirschtenFixed a bug in the Am2900
2019-10-30 Daniel KirschtenAm2900Machine now resets registers in strict mode too
2019-10-24 Christian FemersChanged readme for better status report
2019-10-24 Christian FemersAdded master build status to readme
2019-10-24 Christian Femersadded basic travis ci config for testing it
2019-10-23 Christian FemersFixed description in readme
2019-10-23 Christian FemersSwitched to Maven Tycho 1.5.0
2019-10-17 Christian FemersSmall fixes to mograsim development environment notes.
2019-10-17 Christian FemersAdded new Mograsim project wizard and updated getting...
2019-10-16 Christian FemersRemoved unused code of Bit
2019-10-16 Christian FemersAdded note about GitLab CI artifact
2019-10-16 Christian FemersDeactivated asm editor temporarily
2019-10-16 Christian FemersFixed repository artifact
2019-10-16 Christian FemersTry modified pipeline with repository artifact
2019-10-15 Daniel KirschtenUpdated to new SWTHelper version
2019-10-14 Christian FemersMerge branch 'development' of https://gitlab.lrz.de...
2019-10-14 Christian FemersAutomatically add the default Mograsim memory block...
2019-10-14 Daniel KirschtenFixed a bug when the address size is not divisible...
2019-10-14 Christian FemersMerge branch 'development' of https://gitlab.lrz.de...
2019-10-14 Daniel KirschtenFixed bounds checking and address length in MainMemoryB...
2019-10-14 Christian FemersAllow to add nature and configure in one step
2019-10-14 Christian FemersFixed JavaDoc
2019-10-14 Christian FemersImproved labels and translation
2019-10-12 Daniel KirschtenImproved labels of Am2901's subcomponents
2019-10-12 Daniel KirschtenMade FixedOutput smaller
2019-10-12 Daniel KirschtenImproved BitVectorFormatter for bitvectors of length 1
2019-10-12 Daniel KirschtenSome components drawing Bitvectors now draw them fittin...
2019-10-12 Fabian StemmlerMade Am2900 Bus BitDisplays prettier
2019-10-12 Daniel KirschtenMade ModelBitDisplay/ManualSwitch smaller
2019-10-12 Daniel KirschtenOnly BitDisplay now uses dashes instead of Z
2019-10-12 Daniel KirschtenSome work on improving BitVector<->String conversions
2019-10-12 Fabian StemmlerRolled back toString change in BitVector, moved it...
2019-10-12 Daniel KirschtenImproved RegisterView:
2019-10-12 Fabian StemmlertoString now returns '-' for BitVectors consisting...
2019-10-12 Fabian StemmlerFixed an IndexOutOfBoundsException
2019-10-12 Fabian StemmlerRenamed MainMachineLaunchConfigTab in the Wizard
2019-10-11 Fabian StemmlerMicroInstructionDefinition now also has simple Mnemonic...
2019-10-11 Fabian StemmlerMemory Editor is now more intuitive
2019-10-11 Fabian Stemmler0th Mnemonic is default Mnemonic not otherwise specified
2019-10-11 Fabian StemmlerFixed bug with Exception being thrown with wrong cause
2019-10-09 Fabian StemmlerAdded null check in dispose() of InstructionView
2019-10-08 Fabian StemmlerFixed typo in model.md
2019-10-07 Daniel KirschtenMoved TODOs from getting_started.md to the source code
2019-10-07 Daniel KirschtenAdded register for PC / BZ
2019-10-07 Daniel KirschtenAdded register for IR
2019-10-07 Daniel KirschtenAdded register for muIR
2019-10-07 Daniel KirschtenAdded Am2910 registers
2019-10-07 Daniel KirschtenFixed the same bug in some Am2900-specific ModelComponents
2019-10-07 Daniel KirschtenChanged Modelram5_12's HLS-IDs to have a trailing .q
2019-10-06 Daniel KirschtenMerge remote-tracking branch 'origin/development' into...
2019-10-06 Daniel KirschtenAdded Am2904 registers
2019-10-06 Christian FemersAdded Mograsim perspective that contains all useful...
2019-10-06 Daniel KirschtenMade muSR / MSR accessible bit-wise
2019-10-06 Daniel KirschtenRe-added Am2901 registers
2019-10-06 Daniel KirschtenRestructured register system
2019-10-06 Daniel KirschtenReplaced micro symbols with Unicode escape \u00b5
2019-10-06 Christian FemersAdded RegisterGroups for MachineDefinition
2019-10-06 Daniel KirschtenMerge remote-tracking branch 'origin/development' into...
2019-10-06 Daniel KirschtenMade punctuation uniform in docs/
2019-10-06 Christian FemersFixed register sorting
2019-10-06 Daniel KirschtenAdded comment about missing update site
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