import net.mograsim.logic.core.components.BasicComponent;
import net.mograsim.logic.core.timeline.Timeline;
-import net.mograsim.logic.core.types.MutationOperation;
import net.mograsim.logic.core.types.BitVector.BitVectorMutator;
+import net.mograsim.logic.core.types.MutationOperation;
import net.mograsim.logic.core.wires.Wire.ReadEnd;
import net.mograsim.logic.core.wires.Wire.ReadWriteEnd;
protected ReadWriteEnd out;
protected final int length;
protected MutationOperation op;
+ protected boolean invert = false;
protected MultiInputGate(Timeline timeline, int processTime, MutationOperation op, ReadWriteEnd out, ReadEnd... in)
{
this.out = out;
}
+ protected MultiInputGate(Timeline timeline, int processTime, MutationOperation op, boolean invert, ReadWriteEnd out, ReadEnd... in)
+ {
+ this(timeline, processTime, op, out, in);
+ this.invert = invert;
+ }
+
@Override
public List<ReadEnd> getAllInputs()
{
BitVectorMutator mutator = BitVectorMutator.empty();
for (ReadEnd w : in)
op.apply(mutator, w.getValues());
- out.feedSignals(mutator.get());
+ out.feedSignals(invert ? mutator.get().not() : mutator.get());
}
}