Added Clock input to CoreWordAddressableMemory

[Mograsim.git] / net.mograsim.machine / src / net / mograsim / machine / standard / memory / WordAddressableMemoryAdapter.java

diff --git a/net.mograsim.machine/src/net/mograsim/machine/standard/memory/WordAddressableMemoryAdapter.java b/net.mograsim.machine/src/net/mograsim/machine/standard/memory/WordAddressableMemoryAdapter.java
index 8d76f93..a227266 100644 (file)
--- a/net.mograsim.machine/src/net/mograsim/machine/standard/memory/WordAddressableMemoryAdapter.java
+++ b/net.mograsim.machine/src/net/mograsim/machine/standard/memory/WordAddressableMemoryAdapter.java
@@ -7,7 +7,7 @@ import net.mograsim.logic.core.wires.CoreWire;
 import net.mograsim.logic.core.wires.CoreWire.ReadEnd;
 import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
 import net.mograsim.logic.model.model.wires.Pin;
-import net.mograsim.logic.model.modeladapter.LogicModelParameters;
+import net.mograsim.logic.model.modeladapter.CoreModelParameters;
 import net.mograsim.logic.model.modeladapter.componentadapters.ComponentAdapter;
 
 public class WordAddressableMemoryAdapter implements ComponentAdapter<ModelMemoryWA>
@@ -19,15 +19,16 @@ public class WordAddressableMemoryAdapter implements ComponentAdapter<ModelMemor
                return ModelMemoryWA.class;
        }
 
-       @SuppressWarnings("unused")
        @Override
-       public void createAndLinkComponent(Timeline timeline, LogicModelParameters params, ModelMemoryWA modelComponent,
+       public void createAndLinkComponent(Timeline timeline, CoreModelParameters params, ModelMemoryWA modelComponent,
                        Map<Pin, CoreWire> logicWiresPerPin)
        {
                ReadWriteEnd data = logicWiresPerPin.get(modelComponent.getDataPin()).createReadWriteEnd();
                ReadEnd address = logicWiresPerPin.get(modelComponent.getAddressPin()).createReadOnlyEnd();
                ReadEnd mode = logicWiresPerPin.get(modelComponent.getReadWritePin()).createReadOnlyEnd();
-               new WordAddressableMemoryComponent(timeline, 2, modelComponent.getDefinition(), data, mode, address);
+               ReadEnd clock = logicWiresPerPin.get(modelComponent.getClockPin()).createReadOnlyEnd();
+               CoreWordAddressableMemory mem = new CoreWordAddressableMemory(timeline, 2, modelComponent.getDefinition(), data, mode, address, clock);
+               modelComponent.setCoreModelBinding(mem);
        }
 
 }