net.mograsim.machine/src/net/mograsim/machine/standard/memory/CoreWordAddressableMemory.java

   1 package net.mograsim.machine.standard.memory;
   2
   3 import java.util.List;
   4
   5 import net.mograsim.logic.core.components.BasicCoreComponent;
   6 import net.mograsim.logic.core.timeline.Timeline;
   7 import net.mograsim.logic.core.timeline.TimelineEventHandler;
   8 import net.mograsim.logic.core.types.Bit;
   9 import net.mograsim.logic.core.types.BitVector;
  10 import net.mograsim.logic.core.wires.CoreWire.ReadEnd;
  11 import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
  12 import net.mograsim.machine.MainMemory;
  13 import net.mograsim.machine.MainMemoryDefinition;
  14
  15 /**
  16  * A memory component that only allows access to words of a specific width
  17  */
  18 public class CoreWordAddressableMemory extends BasicCoreComponent
  19 {
  20         private final MainMemory memory;
  21         private final static Bit read = Bit.ONE;
  22
  23         private ReadWriteEnd data;
  24         private ReadEnd rWBit, address;
  25
  26         /**
  27          * @param data    The bits of this ReadEnd are the value that is written to/read from memory; The bit width of this wire is the width of
  28          *                a memory word
  29          * @param rWBit   The value of the 0th bit dictates the mode: 0: Write, 1: Read
  30          * @param address The bits of this ReadEnd address the memory cell to read/write
  31          */
  32         public CoreWordAddressableMemory(Timeline timeline, int processTime, MainMemory memory, ReadWriteEnd data,
  33                         ReadEnd rWBit, ReadEnd address)
  34         {
  35                 super(timeline, processTime);
  36                 MainMemoryDefinition definition = memory.getDefinition();
  37                 if(data.width() != definition.getCellWidth())
  38                         throw new IllegalArgumentException(String.format("Bit width of data wire does not match main memory definition. Expected: %d Actual: %d", definition.getCellWidth(), data.width()));
  39                 if(rWBit.width() != 1)
  40                         throw new IllegalArgumentException(String.format("Bit width of read/write mode select wire is unexpected. Expected: 1 Actual: %d", rWBit.width()));
  41                 if(address.width() != definition.getMemoryAddressBits())
  42                         throw new IllegalArgumentException(String.format("Bit width of address wire does not match main memory definition. Expected: %d Actual: %d", definition.getMemoryAddressBits(), address.width()));
  43                 this.data = data;
  44                 this.rWBit = rWBit;
  45                 this.address = address;
  46                 data.registerObserver(this);
  47                 rWBit.registerObserver(this);
  48                 address.registerObserver(this);
  49
  50                 this.memory = memory;
  51         }
  52
  53         @Override
  54         protected TimelineEventHandler compute()
  55         {
  56                 if (!address.hasNumericValue())
  57                 {
  58                         if (read.equals(rWBit.getValue()))
  59                                 return e -> data.feedSignals(Bit.U.toVector(data.width()));//TODO don't always feed U, but decide to feed X or U.
  60                         return e -> data.clearSignals();
  61                 }
  62                 long addressed = address.getUnsignedValue();
  63                 if (read.equals(rWBit.getValue()))
  64                 {
  65                         BitVector storedData = memory.getCell(addressed);
  66                         return e -> data.feedSignals(storedData);
  67                 }
  68                 else
  69                 {
  70                         BitVector transData = data.getValues();
  71                         return e ->
  72                         {
  73                                 data.clearSignals();
  74                                 memory.setCell(addressed, transData);
  75                         };
  76                 }
  77         }
  78
  79         @Override
  80         public List<ReadEnd> getAllInputs()
  81         {
  82                 return List.of(data, rWBit, address);
  83         }
  84
  85         @Override
  86         public List<ReadWriteEnd> getAllOutputs()
  87         {
  88                 return List.of(data);
  89         }
  90 }