Finished MPROM support. Fixes #10
[Mograsim.git] / plugins / net.mograsim.machine / src / net / mograsim / machine / standard / memory / BitVectorMemoryAdapter.java
1 package net.mograsim.machine.standard.memory;
2
3 import java.util.Map;
4
5 import net.mograsim.logic.core.timeline.Timeline;
6 import net.mograsim.logic.core.wires.CoreWire;
7 import net.mograsim.logic.core.wires.CoreWire.ReadEnd;
8 import net.mograsim.logic.core.wires.CoreWire.ReadWriteEnd;
9 import net.mograsim.logic.model.model.wires.Pin;
10 import net.mograsim.logic.model.modeladapter.CoreModelParameters;
11 import net.mograsim.logic.model.modeladapter.componentadapters.ComponentAdapter;
12 import net.mograsim.machine.BitVectorMemory;
13 import net.mograsim.machine.BitVectorMemoryDefinition;
14
15 public class BitVectorMemoryAdapter implements ComponentAdapter<AbstractModelBitVectorMemory<?, ?>>
16 {
17         @SuppressWarnings({ "cast", "unchecked", "rawtypes" })
18         @Override
19         public Class<AbstractModelBitVectorMemory<?, ?>> getSupportedClass()
20         {
21                 return (Class<AbstractModelBitVectorMemory<?, ?>>) (Class) AbstractModelBitVectorMemory.class;
22         }
23
24         @Override
25         public void createAndLinkComponent(Timeline timeline, CoreModelParameters params, AbstractModelBitVectorMemory<?, ?> modelComponent,
26                         Map<Pin, CoreWire> logicWiresPerPin)
27         {
28                 createAndLinkComponentCasted(timeline, params, modelComponent, logicWiresPerPin);
29         }
30
31         private static <M extends BitVectorMemory, D extends BitVectorMemoryDefinition> void createAndLinkComponentCasted(Timeline timeline,
32                         CoreModelParameters params, AbstractModelBitVectorMemory<M, D> modelComponent, Map<Pin, CoreWire> logicWiresPerPin)
33         {
34                 ReadWriteEnd data = logicWiresPerPin.get(modelComponent.getDataPin()).createReadWriteEnd();
35                 ReadEnd address = logicWiresPerPin.get(modelComponent.getAddressPin()).createReadOnlyEnd();
36                 ReadEnd rwBit = modelComponent.isReadonly() ? null : logicWiresPerPin.get(modelComponent.getReadWritePin()).createReadOnlyEnd();
37                 // TODO introduce memoryProcessTime
38                 CoreBitVectorMemory<M> mem = new CoreBitVectorMemory<>(timeline, 2, modelComponent.getDefinition(), data, rwBit, address,
39                                 modelComponent.isReadonly());
40                 modelComponent.setCoreModelBinding(mem);
41         }
42 }